Configuration and Installation Chapter 2
SCXI-1160 User Manual 2-23 © National Instruments Corporation
4. Pull SLOT0SEL* low to deassert the SS* line and establish conditions for writing a new
slot-select number to the Slot 0 Slot-Select Register.
5. If you are not selecting another slot, write zero to the Slot 0 Slot-Select Register.
Figure 2-11 illustrates a write to the SCXI-1160 Data Register of the binary pattern:
10000011 00001111 00000000 00000000
SLOT0SEL*
SERDATIN
SERCLK
SS*
DAQD*/A
Tdelay1 Tdelay2
Tdelay1 DAQD*/A low to SERCLK first falling edge
Tdelay2 SERCLK last rising edge to DAQD*/A high
Tdelay3 DAQD*/A high to SLOTSEL* low
Tdelay3
1 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
180 nsec
365 nsec
400 nsec
Figure 2-11. Data Register Write Timing Diagram
To read from the Module ID Register, follow these steps:
1. Initial conditions:
SS* asserted low.
SERDATIN = don't care.
DAQD*/A = 0.
SLOT0SEL* = 1.
SERCLK = 1 (and has not changed since DAQD*/A went low).
2. For each bit to be read:
Set SERCLK = 0.
SERCLK = 1. This rising edge clocks the data.
Read the level of the SERDATOUT line.
3. Pull DAQD*/A high. This disables further reads from the Module ID Register. If you wish,
you can write address FFFF (hexadecimal) to the Address Handler. This selects the Parking
Register and makes the module registers more immune to noise.