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Chapter 4
Register Descriptions
© National Instruments Corporation
4-3
SCXI-1100 User Manual
Configuration Register
The Configuration Register contains 24 bits that control the functions of the SCXI-1100. When
SS* is asserted (low) and D*/A indicates data (low), the register shifts in the data present on the
MOSI line, bit 23 first, and then latches it when the SCXI-1100 is deselected by the SS* signal
on the backplane. The Configuration Register initializes to all zeros when the SCXI chassis is
reset or first turned on.
Type:
Write-only
Word Size:
24-bit
Bit Map:
23
22
21
20
19
18
17
16
X
X
X
GAIN4
GAIN3
GAIN2
GAIN1
GAIN0
15
14
13
12
11
10
9
8
CLKOUTEN
CLKSELECT
X
CHAN4
CHAN3
CHAN2
CHAN1
CHAN0
7
6
5
4
3
2
1
0
CAL/ENM*
CV/ZERO*
RTEMP
RSVD
SCANCLKEN*
SCANCONEN
AB0EN
FOUTEN*
Bit
Name
Description
23-21, 13
X
Don't care bits – Unused.
20-16
GAIN<4..0>
Gain Select – Determine the gains of the first and second
stages of the PGIA. The total gain of the amplifier
combination is the product of the first-stage gain and the
second-stage gain. If an invalid bit pattern is programmed,
the gain of the amplifier stage becomes the open-loop gain
of the amplifier and the output of the SCXI-1100 saturates.
The following table describes the amplifier gains:
Bit 17
Bit 16
First-Stage Gain
0
0
1
0
1
10
1
0
100
1
1
not valid (open loop)