© National Instruments
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2-11
NI sbRIO-9651 System on Module Carrier Board Design Guide
Reference Schematic Design Considerations
Table 2-4 lists design considerations for the schematic shown in Figure 2-3.
RS-4
8
5 (Serial5, Serial6)
You can use any FPGA pins to implement an RS-485 port.
The reference carrier board implements one RS-485 port (Serial5). You can implement an
additional RS-485 port (Serial6) in the same way that the Serial5 signal is implemented on the
reference carrier board.
Table 2-4.
Serial2 Reference Schematic Design Considerations
Consideration
Notes
Interface
The reference carrier board demonstrates how to use the Serial2 interface
to implement a null-modem RS-232 serial port.
Serial
transceiver
U19 is the RS-232 serial transceiver that converts between RS-232 and
LVTTL signal levels. To minimize the impact of higher voltage signals
on your carrier board, place the serial transceiver near the RS-232
connector.
Series
termination
• R83, R84, R87, R88, and R90 are the series termination for Serial2.
Use series termination at the serial transceiver on all signals being
driven to the sbRIO-9651 SOM.
• FPGA DIO signals from DIO Bank 0 include series termination on the
sbRIO-9651 SOM. Use series termination at the SEARAY connector
on all signals outside of Bank 0 being driven from the sbRIO-9651
SOM to the serial transceiver.
FPGA
All serial port signals pass through the FPGA on the sbRIO-9651 SOM.
The FPGA_CFG signal is used to disable the serial transceiver when the
FPGA is not configured. Disabling the transceiver in this way prevents
any unwanted glitches on the RS-232 port.