© National Instruments
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1-11
NI sbRIO-9651 System on Module Carrier Board Design Guide
Serial1 Implementation on the Reference Carrier Board
Figure 1-4 shows a schematic design for the Serial1 implementation on the reference carrier
board.
Figure 1-4.
Serial1 Reference Schematic
Reference Schematic Design Considerations
Table 1-11 lists design considerations for the schematic shown in Figure 1-4.
Table 1-10.
Serial1 Signal Definitions
Signal Name
Dedicated
SOM Pin #
Direction
*
I/O
Standard
Description
SERIAL1_TX
52
O
LVTTL
Two-wire serial and
console out signals for
the sbRIO-9651 SOM.
SERIAL1_RX
60
I
*
I/O direction is with respect to the sbRIO-9651 SOM.
Table 1-11.
Serial1 Reference Schematic Design Considerations
Consideration
Notes
Interface
The reference carrier board demonstrates how to use the Serial1 interface
to implement a two-wire RS-232 serial port.
Serial
transceiver
U24 is the RS-232 serial transceiver that converts between RS-232 and
LVTTL signal levels. To minimize the impact of higher voltage signals
on your carrier board, place the serial transceiver near the RS-232
connector.
FPGA_CFG
S
ERIAL1_TX
S
ERIAL1_RX
S
ERIAL1_RX_CONN#
S
ERIAL1_RX_F#
S
ERIAL1_TX_F#
S
ERIAL1_TX_CONN#
1
2
2
0.1 UF 10%
50 V
0.1 UF 10%
50 V
C111
C107
1
2
C188
0.1 UF
10%
16 V
29
3
1
1
2
4
5
7
25
2
3
22
28
9
6
8
16
24
3
2
21
20
19
18
17
14
1
3
12
11
10
15
27
3
3
0
33
26
U24
DIN1
DIN2
DIN
3
ROUT1
ROUT2
ROUT
3
ROUT4
ROUT5
C1+
C1-
C2+
C2-
INVALID~
FORCEON
FORCEOFF~
TR
S3
25
3
EIR
S
MR
VL
NC1
NC
NC
3
NC4
THERMALPAD
V–
V+
DOUT1
RIN
3
RIN2
RIN1
VCC
GND
RIN4
DOUT2
DOUT
3
RIN5
2
1
1
2
1
2
C187
10%
0.1 UF
16 V
1
2
C189
0.1 UF
10%
16 V
C190
0.1 UF
10%
16 V
1
2
2
1
R124
4.7 K
0.5%
1/16 W
2
1
R121
4.7 K
0.5%
1/16 W
2, 4
11
10
9
8
7
6
5
4
3
2
1
12
3
4
6
78
9
5
J15
D
S
UB9-761918-A
2
+
3
.
3
V
+
3
.
3
V
+
3
.
3
V
+
3
.
3
V
+
3
.
3
V
R116
R115
2
1
R125
1 K
0.5%
3
9 0.5%
1/16 W
R12
3
R122
S
PARE
R0402
1
2
C94
C1206,
S
PARE
C99
C1206,
S
PARE
C106
1
2
1
2
1
2
1
2
1
2
0 5%
1/16 W
0 5%
1/16 W
0.1 UF 10%
50 V