Figure 5.
DisplayPort Connector Location and Pinout
1
19
20
2
Table 1.
DisplayPort Connector Signals
Pin
Signal Name
1
ML_Lane0(p)
2
GND
3
ML_Lane0(n)
4
ML_Lane1(p)
5
GND
6
ML_Lane1(n)
7
ML_Lane2(p)
8
GND
9
ML_Lane2(n)
10
ML_Lane3(p)
11
GND
12
ML_Lane3(n)
13
CONFIG1
14
CONFIG2
28
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NI PXIe-8840 Quad-Core User Manual