Chapter 2
Functional Overview
PXI-8150 Series User Manual
2-2
©
National Instruments Corporation
Figure 2-1. PXI-8150 Series Block Diagram
The PXI-8150 consists of the following logic blocks on the CPU
module and the I/O (daughterboard) module. The CPU module has the
following logic blocks:
•
Socket 7 CPU is the socket definition for the Intel Pentium
Processor family.
•
The L2 Cache/Tag block consists of 512 KB of Pipeline Burst
SRAM.
•
The SO-DIMM block consists of two 64-bit EDO DRAM sockets
that can hold up to 64 MB each.
•
The Chip Set block consists of the chip set that connects the CPU
to cache and the DRAM. The chip set also contains the USB
interface and the IDE interface.
•
The PCI video circuitry is a PCI-based design that has a 64-bit data
path to up to 2 MB of EDO DRAM.
Socket 7
CPU
SO-DIMM
EDO
DRAM
Chip Set
Ultra DMA
33 IDE,
USB
PCI Bus
512 KB L2
Cache/Tag
RAM
PCI VIDEO
with 2 MB
EDO DRAM
PXI
Connector
Ethernet
10BaseT
GPIB
PC Peripherals
LPT 1
Internal
Floppy
COM 1
COM 2
Internal
2.5 in. HD
Keyboard/Mouse
Controller
BIOS/Real
Time Clock
Daughter Card
USB
Connector
RJ-45
Connector
GPIB
Connector
Keyboard/Mouse
Controller
I
S
A
B
u
s