Table 2. Signal Descriptions
Signal Name
Description
X<3..0>±
Base configuration data and enable signals from the camera to the NI
PCIe-1477
XCLK±
Transmission clock on the Base configuration chip for Camera Link
communication between the NI PCIe-1477 and the camera
SerTC±
Serial transmission to the camera from the NI PCIe-1477
SerTFG±
Serial transmission to the NI PCIe-1477 from the camera
CC<4..1>±
Four LVDS pairs, defined as camera inputs and NI PCIe-1477 outputs,
reserved for camera control. On some cameras, the camera controls allow the
NI PCIe-1477 to control exposure time and frame rate
DGND/12 V Digital Ground when connected to non-PoCL cameras and 12 V power
supply when connected to PoCL cameras
DGND
Digital Ground
Medium/Full/Extended Camera Link SDR Connector
DGND
Y(0)+
Y(1)+
Y(2)+
YCLK+
Y(3)+
100
Ω
differential termination with pin 20
Z(0)+
Z(1)+
Z(2)+
ZCLK+
Z(3)+
DGND/12 V
DGND/12 V
Y(0)–
Y(1)–
Y(2)–
YCLK–
Y(3)–
100
Ω
differential termination with pin 7
Z(0)–
Z(1)–
Z(2)–
ZCLK–
Z(3)–
DGND
13
12
11
10
9
8
7
6
5
4
3
2
1
26
25
24
23
22
21
20
19
18
17
16
15
14
NI PCIe-1477 Getting Started Guide
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© National Instruments
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