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Chapter 4
PFI
Using PFI Terminals as Timing Input Signals
Use PFI terminals to route external timing signals to many different functions. Each PFI terminal
can be routed to any of the following signals:
•
Counter input signals for all counters—Source, Gate, Aux, HW_Arm, A, B, Z
•
Counter
n
Sample Clock
•
DI Sample Clock (di/SampleClock)
•
DI Sample Clock Timebase (di/SampleClockTimebase)
•
DI Reference Trigger (di/ReferenceTrigger)
•
DO Sample Clock (do/SampleClock)
Most functions allow you to configure the polarity of PFI inputs and whether the input is edge
or level sensitive.
Exporting Timing Output Signals Using
PFI Terminals
You can route any of the following timing signals to any PFI terminal configured as an output:
•
DI Sample Clock (di/SampleClock)
•
DI Start Trigger (di/StartTrigger)
•
DI Reference Trigger (di/ReferenceTrigger)
•
DI Pause Trigger (di/PauseTrigger)
•
DO Sample Clock* (do/SampleClock)
•
DO Start Trigger (do/StartTrigger)
•
DO Pause Trigger (do/PauseTrigger)
•
Counter
n
Source
•
Counter
n
Gate
•
Counter
n
Internal Output
•
Counter
n
Sample Clock
•
Counter
n
Counter
n
HW Arm
•
Frequency Output
•
RTSI<0..7>
•
PXI_STAR
•
PXI_Trig<0..7>
•
Change Detection Event
Note
Signals with an * are inverted before being driven to a terminal; that is, these
signals are active low.
