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5-3
Caution
Do
not
disconnect an external reference clock once the devices have been
synchronized or are used by a task. Doing so may cause the device to go into an
unknown state. Make sure that all tasks using a reference clock are stopped before
disconnecting it.
Enabling or disabling the PLL through the use of a reference clock affects the clock
distribution to all subsystems. For this reason, the PLL can only be enabled or
disabled when no other tasks are running in any of the device subsystems.
10 MHz Reference Clock
The 10 MHz reference clock can be used to synchronize other devices to your NI 6612 device.
The 10 MHz reference clock can be routed to the RTSI <0..7>, PXI_Trigger <0..7> or
PFI <0..39> terminals. Other devices connected to the PXI_Trig bus can use this signal as a
clock input.
The 10 MHz reference clock is generated from the onboard oscillator.
PXIe_CLK100 (NI PXIe-6612 Only)
PXIe_CLK100 is a common low-skew 100 MHz reference clock for synchronization of multiple
modules in a PXI Express measurement or control system. The PXIe backplane is responsible
for generating PXIe_CLK100 independently to each peripheral slot in a PXI Express chassis.
For more information, refer to the
PXI Express Specification
at
PXIe_SYNC100 (NI PXIe-6612 Only)
PXIe_SYNC100 is a common low-skew 10 MHz reference clock with a 10% duty cycle for
synchronization of multiple modules in a PXI Express measurement or control system. This
signal is used to accurately synchronize modules using PXIe_CLK100 along with those using
PXI_CLK10. The PXI Express backplane is responsible for generating PXIe_SYNC100
independently to each peripheral slot in a PXI Express chassis. For more information, refer to
the
PXI Express Specification
at
.
PXI_CLK10 (NI PXIe-6612 Only)
PXI_CLK10 is a common low-skew 10 MHz reference clock for synchronization of multiple
modules in a PXI measurement or control system. The PXI Express backplane is responsible for
generating PXI_CLK10 independently to each peripheral slot in a PXI Express chassis.
Default Routing
By default, DAQmx routes certain PFI signals to and from each of the counters. Tables 5-1
and 5-2 show the default routing for counter signals.