National Instruments NI 651 Series, User Manual

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Chapter 1 NI 651x Fundamentals
Figure 1-6.
NI 6515 Block Diagram
Figure 1-7. NI 6516 Block Diagram
Figure 1-8. NI 6517 Block Diagram
PX.COM (Vcc)
PX.<0..7>
PX.GND
DO
x8 O u tp u t s per Port
x4 B a nk I s ol a ted Digit a l O u tp u t Port s
PCI/PXI/Comp
a
ctPCI B
us
D a t a /Control
PCI B us
Interf a ce
10 MHz
Clock
3 2
Digit a l
O u tp u t s
3 2
Digit a l
Inp u t s
I/O Connector
8
PX.COM
PX.<0..7>
Vcc
x4 B a nk I s ol a ted Digit a l Inp u t Port s
x8 Inp u t s per Port
DI
Ind us tri a l Digit a l
I/O Control FPGA
DIO Line
s
Progr a mm ab le
Power-Up S t a te s
W a tchdog Timer
Ch a nge
Detection
Digit a l
Filtering
D a t a /Control
Fl as h
Memory
Config u r a tion
Control
Volt a ge
Reg u l a tor
Ind us tri a l Digit a l
O u tp u t Control FPGA
O
u
tp
u
t Line
s
Progr a mm ab le
Power-Up S t a te s
W a tchdog Timer
PCI B
us
10 MHz
Clock
D a t a /Control
PCI B us
Interf a ce
D a t a /Control
Fl as h
Memory
Config u r a tion
Control
COM.GND
VCC
PX.<0..7>
3 2
DO
x 3 2 B a nk I s ol a ted O u tp u t Ch a nnel s
Volt a ge
Reg u l a tor
I/O Connector
3 2 Digit a l
O u tp u t s
Ind us tri a l Digit a l
O u tp u t Control FPGA
O
u
tp
u
t Line
s
Progr a mm ab le
Power-Up S t a te s
W a tchdog Timer PCI B
us
10 MHz
Clock
D a t a /Control
PCI B us
Interf a ce
D a t a /Control
Fl as h
Memory
Config u r a tion
Control
I/O Connector
COM (VCC)
PX.<0..7>
GND
DO
x 3 2 B a nk I s ol a ted O u tp u t Ch a nnel s
Volt a ge
Reg u l a tor
3 2 Digit a l
O u tp u t s