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National Instruments NI-5761 User Manual And Specifications Download Page 21

 NI 5761R User Guide and Specifications

20

ni.com

Internal Sample Clock

General Characteristics

Oscillator type........................................................Fixed frequency synthesizer

Frequency...............................................................250 MHz

Reference spurs......................................................<70 dBc

Phase noise

10 kHz offset..................................................–100 dBc/Hz

100 kHz offset................................................–120 dBc/Hz

Clock distribution part number ..............................AD9512

1

; clock distribution

Reference clock sources.........................................Internal, External through the CLK IN connector, or 

IoModSyncClk

2

Internal reference type ...........................................TCXO

Internal reference stability .....................................±1 ppm

Internal reference frequency ..................................10 MHz

CLK IN

General Characteristics

Number of channels ...............................................1, single-ended

Connector...............................................................SMA

Input impedance.....................................................50

Ω

Input coupling ........................................................AC

External Sample Clock

Input voltage range ................................................0.63 V

pk-pk

 to 2.5 V

pk-pk

Input frequency range ............................................175 MHz to 250 MHz

Absolute maximum input.......................................±10 V DC, 3.1 V

pk-pk

 AC

External Reference Clock

Input voltage range ................................................1.4 V

pk-pk

 to 4.4 V

pk-pk

Input frequency range ............................................10 MHz

Absolute maximum input.......................................±10 V DC, 5 V

pk-pk

 AC

External Trigger

General Characteristics

Number of channels ...............................................1, single-ended

Connector...............................................................SMA

Input impedance.....................................................50

Ω

Input coupling ........................................................DC

1   

For additional information about the AD9512, refer to the Analog Devices device data sheet at 

www.analog.com

.

2   

IoModSyncClk is available only on the NI PXIe-796

x

R FPGA modules.

Summary of Contents for NI-5761

Page 1: ...NI 5761...

Page 2: ...s Front Panel and Connector Pinouts 2 Block Diagram 4 NI 5761 Component Level Intellectual Property CLIP 5 Cables 6 Clocking 7 Using Your NI 5761R with a LabVIEW FPGA Example VI 7 Creating a LabVIEW P...

Page 3: ...before powering down the module and only connect signals after the adapter module has been powered on by the NI FlexRIO FPGA module Table 1 NI 5761 Front Panel Connectors Device Front Panel Connector...

Page 4: ...sis NI is not liable for any damage resulting from such signal connections For the maximum input and output ratings for each signal refer to the Specifications section of this document Table 2 NI 5761...

Page 5: ...nitialization Done Reinitialize Configuration Error Sample Clock Select Sample Clock Commit SPI Idle Analog FE IO Module Clock 0 n 1 Single Sample CLIP n 2 Multiple Sample CLIP Multiple Sample CLIP Si...

Page 6: ...IP integration functionality of the user defined CLIP but also allows the CLIP to communicate directly with circuitry external to the FPGA Adapter module socketed CLIP allows your IP to communicate di...

Page 7: ...e CLIP Generates one sample per clock cycle at a default sample rate of 250 MHz You can set a lower sample rate by using an external Sample clock This CLIP provides access to four analog input channel...

Page 8: ...I Note In NI application software NI FlexRIO adapter modules are referred to as IO Modules Complete the following steps to run an example that acquires a waveform on CH 0 of the NI 5761 1 Connect one...

Page 9: ...Channel box 9 Set the Trigger Level V and the Record Size controls to the desired value 10 In the Trigger Type box you can select either Software Trigger or Data Edge If you select Software Trigger th...

Page 10: ...25 MHz in the Compile for single frequency control Click OK 8 Right click the FPGA target and select New FPGA Base Clock again 9 In the Resource pull down menu select 200 MHz Clock Click OK 10 Right c...

Page 11: ...right click My Computer and select New VI A blank VI opens Select Window Show Block Diagram to open the VI block diagram 2 Add the Open FPGA VI Reference function located on the FPGA Interface palette...

Page 12: ...Reference function located on the FPGA Interface palette to the right of the While Loop on the block diagram 17 Wire the FPGA VI Reference Out indicator of the Read Write Control function to the FPGA...

Page 13: ...elp Embedded in LabVIEW Help Contains information about the basic functionality of LabVIEW FPGA Module NI FlexRIO Help Embedded in LabVIEW FPGA Module Help Contains FPGA module adapter module and CLIP...

Page 14: ...otherwise noted All graphs illustrate the performance of a representative module Typical values describe useful product performance that are not covered by warranty Typical values cover the expected p...

Page 15: ...dB 100 1 MHz 90 dB 501 MHz 80 dB AC Coupled Measurements Figure 8 AC Coupled Bandwidth Passband Table 5 AC Coupled Spectral Performance Measurement 20 17 MHz 70 17 MHz 123 17 MHz SNR 72 5 dB 71 4 dB 7...

Page 16: ...S Average Figure 10 AC Coupled Spectral Measurements 20 1 MHz 1 dBFS 8 192 Point FFT 10 RMS Average 20 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 Amplitude dBFS Freque...

Page 17: ...to 250 MHz Table 6 lists the DC coupled spectral performance measurements All values are measured with a 250 MHz external Sample clock Channel to channel isolation 1 MHz 90 dB 100 1 MHz 80 dB 501 MHz...

Page 18: ...you can add series resistance close to the source to properly bias the NI 5761 input terminals You can also use the NI 5761 input channel bias DACs to remove DC offset present in the system For more i...

Page 19: ...igure 14 DC Coupled Spectral Measurements 20 1 MHz 1 dBFS 8 192 Point FFT 10 RMS Average 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 0 Amplitude dBFS Frequency MHz 15 10 5 25 50...

Page 20: ...t FFT 10 RMS Average Analog Input Phase Noise Figure 16 Analog Input Phase Noise 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 0 Amplitude dBFS Frequency MHz 15 10 5 20 40 60 80 10...

Page 21: ...l Characteristics Number of channels 1 single ended Connector SMA Input impedance 50 Input coupling AC External Sample Clock Input voltage range 0 63 Vpk pk to 2 5 Vpk pk Input frequency range 175 MHz...

Page 22: ...out 50 Iout 2 mA Maximum toggle frequency 500 kHz Absolute maximum input 0 5 V to 7 V EEPROM Map Caution Only write to User Space Writing to any other offset may cause the NI 5761 to stop functioning...

Page 23: ...with IEC 60068 2 1 and IEC 60068 2 2 Relative humidity range 5 to 95 noncondensing tested in accordance with IEC 60068 2 56 Note Clean the device with a soft non metallic brush Make sure that the dev...

Page 24: ...ification search by model number or product line and click the appropriate link in the Certification column Environmental Management National Instruments is committed to designing and manufacturing pr...

Page 25: ...rth Mopac Expressway Austin Texas 78759 3504 National Instruments also has offices located around the world to help address your support needs For telephone support in the United States create your se...

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