National Instruments NI 5401 User Manual Download Page 42

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Appendix A

Specifications

NI 5401 User Manual

A-2

ni.com

Pre-attenuation offset

Range...............................................±2.5 V into 50

Ω

Accuracy..........................................±5 mV

Output coupling ......................................DC

Output impedance...................................50

Ω

75 Ω

software selectable

Load impedance......................................50

Ω

or greater

Output enable..........................................Software switchable

Protection................................................Short-circuit protected

Sine Spectral Purity

Harmonic products and spurs

Up to 1 MHz....................................–60 dBc

Up to 16 MHz..................................–35 dBc

Phase noise .............................................–105 dBc/Hz at 10 kHz from

carrier

Filter Characteristics

Digital

Type .................................................Half-band interpolating

Selection ..........................................Software switchable

(enable or disable)

Taps .................................................67

Filter coefficients.............................Fixed 20-bit

Data interpolating frequency ...........80 MS/s

Pipeline signal delay........................26 sampling periods

Analog

Type .................................................7th-order L-C lowpass filter

Passband ripple ................................±2 dB

With less than 10 dB of attenuation, signal maximum plus offset (before attenuation) must not exceed ±5 V (into 50

Ω).

Summary of Contents for NI 5401

Page 1: ...derutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In stock Ready to ship TAR certified secure asset solutions Expert team I Trust guarantee I 100 satisfaction All trademarks brand names and brands appearing herein are the property of their respective own...

Page 2: ...Computer Based Instruments NI 5401 User Manual PXI PCI Arbitrary Function Generator NI 5401 User Manual May 2001 Edition Part Number 322419B 01 ...

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Page 4: ...ce failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmit...

Page 5: ...ments could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environ...

Page 6: ...bought for OEMs if also available from an original manufacturer that also markets in the EU or where compliance is not required as for electrically benign apparatus or cables To obtain the DoC for this product click Declaration of Conformity at ni com hardref nsf This website lists the DoCs by product family Select the appropriate product family followed by your product and a link to the DoC appea...

Page 7: ...ortant information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash This icon denotes a warning which advises you of precautions to take to avoid being electrically shocked bold Bold text denotes items that you must select or click on in the software such as menu items and dialog box options Bold text also denotes parameter names ital...

Page 8: ...d with Your NI 5401 1 9 Interactive Sources Soft Front Panel 1 9 NI FGEN Instrument Driver 1 10 Additional National Instruments Development Tools 1 10 LabVIEW 1 10 LabWindows CVI 1 11 ComponentWorks 1 11 Using the Sources Soft Front Panel to Generate Waveforms 1 12 Generating Standard Functions 1 12 Waveform Editor 1 15 Power Up and Reset Conditions 1 16 Chapter 2 Function Generator Operation Gene...

Page 9: ... Impedance 2 10 Output Enable 2 10 Phase Locked Loops and Board Synchronization 2 11 Analog Filter Correction 2 12 RTSI PXI Trigger Lines 2 13 Calibration 2 15 Appendix A Specifications Appendix B Optional Accessories Appendix C Frequency Resolution and Lookup Memory Appendix D Technical Support Resources Glossary Index ...

Page 10: ...tures One 12 bit resolution output channel Up to 16 MHz sine and transistor transistor logic TTL waveform output Up to 1 MHz square triangle ramp up and ramp down DC and noise Software selectable output impedances of 50 Ω and 75 Ω Output attenuation levels from 0 to 73 dB Phase locked loop PLL synchronization to external clocks Sampling rate of 40 MS s Digital and analog filter 32 bit direct digit...

Page 11: ... equipment could result in a shock hazard Do not substitute parts or modify equipment Because of the danger of introducing additional hazards do not install unauthorized parts or modify the device Return the device to National Instruments for service and repair to ensure that its safety features are not compromised You must insulate all of your signal connections to the highest voltage with which ...

Page 12: ... the NI 5401 PXI and PCI buses The front panel contains three types of connectors BNC SMB and 50 pin very high density SCSI VHDSCSI The main waveform is generated through the connector labeled ARB on the PCI version and ARB OUT on the PXI version Figure 1 1 NI 5401 I O Connectors ARB OUT SYNC OUT EXT TRIG PLL REF LOCK ACCESS PXI PCI SYNC PLL IN ARB PATTERN OUT ...

Page 13: ...NI 5401 By default RO 50 Ω but you can use your software to set it to 75 Ω Figure 1 2 Output Levels and Load Termination Using a 50 Ω Output Impedance Note Software sets the voltage output levels based on a 50 Ω load termination For more information on waveform generation and analog output operation refer to Chapter 2 Function Generator Operation For specifications on the waveform output signal se...

Page 14: ...pter 2 Function Generator Operation PLL Ref Connector The PLL Ref connector is a phase locked loop PLL input connector that can accept a reference clock from an external source and frequency lock the NI 5401 internal clock to this external clock The reference clock should not deviate more than 100 ppm from its nominal frequency The minimum amplitude levels of 1 Vpk pk are required on this clock Yo...

Page 15: ...al connector Refer to Table 1 1 for a description of the signals Figure 1 4 NI 5401 50 Pin Digital Connector Pin Assignments 50 1 26 2 27 3 28 4 29 5 30 6 31 7 32 8 33 9 34 10 35 11 36 12 37 13 38 14 39 15 40 16 41 17 42 18 43 19 44 20 45 21 46 22 47 23 48 24 49 DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND NC DGND NC DGND NC DGND RFU RFU RFU RFU RFU RFU RFU...

Page 16: ...ure 1 5 shows the 68 pin connector pin assignments on the SHC50 68 cable Note The SHC50 68 connector uses the same signals as the NI 5401 digital output connector shown in Table 1 1 Table 1 1 Digital Connector Signal Descriptions Signal Name Type Description DGND Digital ground EXT_TRIG Input Externaltrigger TheexternaltriggerinputsignalisaTTL level signal that you can use to start or step through...

Page 17: ...32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 26 RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU NC NC NC NC NC NC NC NC EXT_TRIG NC 68 DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND RFU DGND DGND DGND DGND DGND DGND DGND ...

Page 18: ...lay capabilities The Sources Soft Front Panel loads and saves waveform data in a form that popular spreadsheet programs and word processors can use You can print the waveforms and the settings of the Sources Soft Front Panel to a printer connected to the PC Single Waveform Output from DDS Memory The Sources Soft Front Panel transforms your PC into a fully featured function generator by using the D...

Page 19: ...GEN menu Note An NI FGEN Instrument Driver Quick Reference Guide is included in your NI 5401 kit This reference guide helps you program your NI 5401 Additional National Instruments Development Tools The following sections describe several additional tools that you can use to develop complex applications for your NI 5401 The NI FGEN instrument driver exposes the Application Programming Interfaces A...

Page 20: ...with standard C C compilers including Visual C and Borland C under Windows Note Use the NI FGEN instrument driver to program and control your NI 5401 using LabWindows CVI ComponentWorks ComponentWorks is a collection of 32 bit ActiveX controls for building virtual instrumentation systems ComponentWorks gives you the power and flexibility of standard development tools such as Microsoft Visual Basic...

Page 21: ...ions If you need to generate standard waveforms such as a sine square ramp or DC signal you can use the Sources Soft Front Panel in the operation mode as shown in Figure 1 6 Launch the front panel from the task menu You use this front panel to control the frequency amplitude offset and type of waveform generated For the NI 5401 the maximum sine frequency you can generate is 16 MHz The maximum ampl...

Page 22: ...3 NI 5401 User Manual To control additional instrument parameters select Edit Device Configuration to bring up the dialog box shown in Figures 1 7 and 1 8 Figure 1 7 Sources Soft Front Panel Output Settings Dialog Box Figure 1 8 Sources Soft Front Panel Update Clock Settings Dialog Box ...

Page 23: ...ect File Load Waveform or press the button next to the Active Waveform String display 2 Choose the file which contains the waveform pattern to import The supported file formats are sound wav text txt and binary bin Depending on the file you choose one of the screens in Figure 1 9 is displayed 3 If the waveform on file contains more than 16 384 samples specify a subset of the waveform pattern Figur...

Page 24: ...rm Editor You can select waveforms from the function library write equations or draw them manually Each segment can have more than one waveform component in it and you can perform a variety of math functions on each component Figure 1 10 Waveform Editor Soft Front Panel You can save the waveforms in the following formats Text txt Binary bin Binary waveforms are the preferred format for the NI 5401...

Page 25: ...s enabled Output attenuation remains unchanged from its previous setting The analog filter remains unchanged from its previous setting Output impedance remains unchanged from its previous setting When you reset the board using NI FGEN or any other application software your NI 5401 is in the same state as shown at power up previously listed with the following differences Output attenuation is set t...

Page 26: ...ck diagram Figure 2 1 NI 5401 Block Diagram Data Path PXI PCI Channel Waveform Sequencer IFIFO Control RTSI PXI Trigger Bus Instruction FIFOs RTSI Control ARB SYNC PLL Ref Analog Control DAC DDS Lookup Memory Attenuators Filter and Amplifier Level Crossing Detector PLL and Clocking DDS Control Digital Filter Trigger Control Filter Controls Clock Controls Bus Interface ...

Page 27: ...ly the I O connector Generating Waveforms The NI 5401 generates waveforms using DDS which is used for generating standard waveforms that are repetitive in nature such as sine TTL square and triangular waveforms DDS mode limits you to one buffer and the buffer size must be exactly equal to 16 384 samples Figure 2 2 shows a block diagram of the data path for waveform generation The data for waveform...

Page 28: ... memory and a 12 bit DAC for DDS based waveform generation Figure 2 3 shows the building blocks for DDS based waveform generation Figure 2 3 DDS Building Blocks The lookup memory is dedicated to the DDS You can store one cycle of a repetitive waveform a sine triangular square or arbitrary wave in the lookup memory Then you can change the frequency of that waveform by sending just one instruction Y...

Page 29: ...ffer loaded into the lookup memory All stages differ in the frequency to be generated Note The minimum time that a frequency should be generated is 3 µs Therefore the maximum hop rate from frequency to frequency is 333 kHz The maximum number of stages that can be stored in the instruction FIFO for DDS mode is 512 For more information on the waveform generation process refer to your software docume...

Page 30: ...ngle continuous and stepped described in the following sections Single Trigger Mode The waveform you define in the staging list is generated only once by going through the entire staging list Only one trigger is required to start the waveform generation In single trigger mode after the NI 5401 receives a trigger the waveform generation starts at the first stage and continues through the last stage...

Page 31: ...fine in the staging list is generated infinitely by continually cycling through the staging list After a trigger is received the waveform generation starts at the first stage continues through the last stage and loops back to the start of the first stage continuing until you stop the waveform generation Only one trigger is required to start the waveform generation Figure 2 6 illustrates a continuo...

Page 32: ...Analog Output Analog waveforms are generated as follows 1 The 12 bit digital waveform data is fed to a high speed DAC 2 A lowpass filter filters the DAC output 3 This filtered signal is amplified before it goes to a 10 dB attenuator Note The DAC output can be fine tuned for gain and offset Since the offset is adjusted before the main attenuators and amplifier it is referred to as pre attenuation o...

Page 33: ...elay from trigger to output on Arb output Refer to Appendix A Specifications for more information on these timing parameters Figure 2 9 Waveform and Trigger Timings Note You can switch off the analog lowpass filter at any time during waveform generation When you change this setting the bouncing of electromechanical relays on the NI 5401 distorts the output signal for about 10 ms DAC Gain DAC Pre A...

Page 34: ... DAC The SYNC output might not carry meaning for other types of generated waveforms Note You can change the duty cycle of the SYNC output at any time during waveform generation Output Attenuation Figure 2 10 shows the NI 5401 output attenuator chain The output attenuators are made of resistor networks and may be switched in any combination The maximum attenuation possible on the NI 5401 is 73 dB F...

Page 35: ...t applications use a load impedance of 50 Ω but applications such as video device testers require 75 Ω If the load is a very high input impedance load 1 MΩ you will see output levels up to 10 V Note You can change the output impedance at any time during waveform generation When you change this setting the bouncing of electromechanical relays on the NI 5401 distorts the output signal for about 10 m...

Page 36: ...a 10 MHz Osc line on the PXI backplane bus for NI 5401 for PXI The PLL can also be tuned internally using a calibration DAC CalDAC National Instruments accurately performs this tuning during manufacturing Refer to the RTSI PXI Trigger Lines section later in this manual for additional information on using the RTSI and 10 MHz Osc lines The reference and VCXO clock are compared by a phase comparator ...

Page 37: ...hase relationship is indeterminate Analog Filter Correction The NI 5401 can correct for slight deviations in the flatness of the frequency characteristic of the analog lowpass filter in its passband as shown in Figure 2 13 Curve A shows a typical lowpass filter curve The response of the filter is stored in an onboard EEPROM in 1 MHz increments up to 16 MHz Curve C is the correction applied to the ...

Page 38: ...he RTSI bus to send and receive NI 5401 specific information to other boards that have RTSI connectors Figure 2 14 shows the RTSI trigger lines and routing of NI 5401 for PCI signals to the RTSI switch Figure 2 14 RTSI Trigger Lines and Routing for the NI 5401 for PCI A B C Frequency MHz Gain dB A Typical Analog Filter Characteristics B Corrected Filter Characteristics C Correction Applied RTSI Sw...

Page 39: ...ed on the NI 5401 to other boards through any of the RTSI PXI bus trigger lines Route the SYNC output generated on the NI 5401 to other boards through any of the RTSI PXI bus trigger lines You can use this signal to give other boards an accurate and fine frequency resolution clock NI 5401 for PCI For frequency locking to other boards as a master the NI 5401 sends an onboard 20 MHz signal to the RT...

Page 40: ...hese adjustments by retrieving predetermined constants from the onboard EEPROM calculating correction values and writing those values to the CalDACs National Instruments calibrates all NI 5401 devices to the levels indicated in Appendix A Specifications Factory calibration involves procedures such as nulling the offset and gain errors However since offset and gain errors may drift with time and te...

Page 41: ...mperature range is 0 to 50 C Analog Output Number of channels 1 Resolution 12 bits Maximum update rate 40 MHz DDS accumulator 32 bits Frequency range Sine 16 MHz max SYNC TTL 16 MHz max Square 1 MHz max Ramp 1 MHz max Triangle 1 MHz max Frequency resolution 9 31 mHz Voltage Output Ranges 5 V into a 50 Ω load 10 V into a high impedance load Accuracy 0 1 dB Output attenuation 0 to 73 dB Resolution 0...

Page 42: ...onic products and spurs Up to 1 MHz 60 dBc Up to 16 MHz 35 dBc Phase noise 105 dBc Hz at 10 kHz from carrier Filter Characteristics Digital Type Half band interpolating Selection Software switchable enable or disable Taps 67 Filter coefficients Fixed 20 bit Data interpolating frequency 80 MS s Pipeline signal delay 26 sampling periods Analog Type 7th order L C lowpass filter Passband ripple 2 dB 1...

Page 43: ... MHz only Frequency locking External reference sources Input connector RTSI clock line or internal Reference clock frequencies 1 MHz 5 20 MHz in 1 MHz steps Frequency locking range 100 ppm Triggers Digital Trigger Compatibility TTL Response Rising edge Pulse width Td1 20 ns min Trigger to waveform output delay Td2 28 sample clocks 150 ns max RTSI Trigger lines 7 Clock lines 1 Bus Interface Type Sl...

Page 44: ...al Clock Frequency 40 MHz Initial accuracy 5 ppm Temperature stability 0 to 5 C 25 ppm Aging 1 year 5 ppm Mechanical Connectors ARB output SMB BNC SYNC output SMB BNC PLL reference input SMB External trigger in PCI 50 pin digital PXI SMB Size 1 slot Power requirements 5 V 3 5 A max 12 V 125 mA Safety Designed in accordance with IEC 61010 1 EN 61010 1 UL 3111 1 and CAN CSA C22 2 No 1010 1 for elect...

Page 45: ...1 Note For full EMC and EMI compliance you must operate this device with shielded cabling See the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product click Declaration of Conformity at ni com hardref nsf This website lists the DoCs by product family Select the appropriate product family followed by your product and ...

Page 46: ...umbers for cables that you can use with your NI 5401 device Table B 1 National Instruments Optional Cable Accessories Product Cable Name Part Number Cable Description AT and PCI 5401 SMB 110 763405 01 50 Ω SMB male to BNC male 1 m coaxial cable SMB 300 763388 01 50 Ω SMB male to alligator clip 1 m cable SHC50 68 0 5m 184748 0R5 Sheilded 50 pin male VHDSCSI to 68 pin female SCSI 1 m cable also avai...

Page 47: ...IN Rail Mounting CB 68LP 777145 01 Low cost accessory with 68 screw terminals for easily connecting to 68 pin DAQ devices CB 68LPR 777145 02 Low cost accessory with 68 screw terminals for easily connecting to 68 pin DAQ devices Table B 3 Third Party Vendor Optional Cable Accessories Product Vendor Part Number Cable Type NI 5401 ITT Pomona Electronics BNC C xx BNC male to BNC male 50 Ω cable 2249 E...

Page 48: ...ency of the output signal N accumulator size in bits For the NI 5401 N 32 FCW frequency control word to be loaded into the accumulator to generate Fa The frequency control word is calculated using the formula FCW 2N Fa Fc The frequency resolution is then given by frequency resolution Fc 2N 40 106 232 9 31322 mHz For example if you need to generate a frequency of 10 MHz then the FCW is 232 10E6 40E...

Page 49: ...z the software writes an FCW value of 2 N L where N is the size of the accumulator and L is the number of address bits of lookup memory L 14 bits Thus the FCW value for the NI 5401 equals 262 144 Since FCW 2N Fa Fc Fa 2 N L Fc 2N so you would write a frequency value of 2 32 14 40 106 232 which equals 2 441 kHz If you want to update every sample in lookup memory at an integral subdivision D of the ...

Page 50: ...he latest example programs system configurators tutorials technical news as well as a community of developers ready to share their own techniques Customer Education National Instruments provides a number of alternatives to satisfy your training needs from self paced tutorials videos and interactive CDs to instructor led hands on courses at locations around the world Visit the Customer Education se...

Page 51: ...ites from the Worldwide Offices section of ni com Branch office Web sites provide up to date contact information support phone numbers e mail addresses and current events If you have searched the technical support resources on our Web site and still cannot find the answers you need contact your local office or National Instruments corporate Phone numbers for our worldwide offices are listed at the...

Page 52: ...i 10 3 k kilo 103 M mega 106 Numbers Symbols percent positive of or plus negative of or minus plus or minus per degree Ω ohm 5 V 5 V output signal A A amperes amplification method of scaling the signal level to a higher level ARB normal waveform output signal attenuation decreasing the amplitude of a signal ...

Page 53: ...own as the ISA bus and the PCI bus C C Celsius CalDAC calibration DAC clock hardware component that controls timing for reading from or writing to groups CMOS complementary metal oxide semiconductor continuous trigger mode repeats a staging list until waveform generation is stopped counter a circuit that counts external pulses or clock pulses timing coupling the manner in which a signal is connect...

Page 54: ...ty to generate very high frequency resolution standard waveforms DGND digital ground signal digital word See word driver software that controls a specific hardware device dynamic range the ratio of the largest signal level a circuit can handle to the smallest signal level it can handle usually taken to be the noise level normally expressed in dB E EEPROM electrically erasable programmable read onl...

Page 55: ...he case of analog output a FIFO permits faster update rates because the waveform data can be stored on the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device filters digital or analog circuits that change the frequency characteristics of a waveform frequency hop change from one frequency to another frequency resolutio...

Page 56: ...h as volts hertz and meters K kilo the prefix for 1 024 or 210 used with B in quantifying data or computer memory kS 1 000 samples Kword 1 024 words of memory L latch a digital device that stores digital data based on a control signal level DAC the calibration DAC used to change the voltage levels to another device linking linking different buffers stored in the waveform memory looping repeating t...

Page 57: ...ransmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive O output enable relay a relay switch at the output of the NI 5401 that can enable the waveform generation at any time or that can connect the output to ground P passband the range of frequencies which a device can properly propagate or measure PCI Peripheral Com...

Page 58: ...attenuation offset an offset provided to the signal before it reaches the attenuators protocol the exact sequence of bits characters and control codes used to transfer data between computers and peripherals through a communications channel such as the GPIB bus PXI PCI eXtensions for Instrumentation R resolution the smallest signal increment that can be detected by a measurement system Resolution c...

Page 59: ...er position for that buffer and the sample count for the buffer for DDS mode specifies the frequency to be generated of the waveform in the lookup memory and the time for which that frequency has to be generated staging list a buffer that contains linking and looping information for multiple waveforms also known as a sequence list or waveform sequence stepped trigger mode a mode of waveform genera...

Page 60: ...ored in the waveform memory that represent a desired waveform Also known as a waveform segment waveform linking and looping See linking looping waveform memory physical data storage on the NI 5401 for storing the waveform data samples waveform segment See waveform buffer waveform sequence See staging list waveform staging See linking looping word The standard number of bits that a processor or mem...

Page 61: ...thesis DDS DGND signal table 1 7 digital connector signal descriptions table 1 7 digital trigger specifications A 3 direct digital synthesis DDS building blocks for DDS figure 2 3 description 2 3 to 2 4 frequency hopping and sweeping 2 4 frequency resolution and lookup memory C 1 to C 2 single waveform output from DDS memory 1 9 duty cycle of SYNC output 2 9 E electromagnetic compatibility specifi...

Page 62: ...in cable connector 1 7 pin assignments figure 1 8 signals 1 7 SYNC connector 1 4 to 1 5 L LabVIEW software 1 10 LabWindows CVI software 1 11 lookup memory description 2 3 frequency resolution and lookup memory C 1 to C 2 waveform memory 2 4 M mechanical specifications A 4 N NI 5401 See also function generator operation block diagram 2 1 components 2 2 connecting signals 1 3 to 1 8 ARB connector 1 ...

Page 63: ...0 sources soft front panel 1 9 Waveform Editor 1 9 sources soft front panel See also Waveform Editor DDS output mode figure 1 12 General Settings dialog box figure 1 13 generating standard functions 1 12 to 1 14 overview 1 9 single waveform output from DDS memory 1 9 Update Clock Settings dialog box figure 1 13 Waveform Import dialogs figure 1 14 specifications A 1 to A 5 analog output A 1 bus int...

Page 64: ...m waveforms 1 15 description 1 9 waveform generation See also function generator operation analog waveforms 2 7 to 2 10 data path block diagram figure 2 2 overview 2 2 to 2 3 using sources soft front panel generating standard functions 1 12 to 1 14 single waveform output from DDS memory 1 9 using Waveform Editor 1 15 waveform memory lookup 2 4 waveform specifications A 3 Web support from National ...

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