Chapter 2
Function Generator Operation
2-12
ni.com
Figure 2-12.
PLL Architecture for the NI 5401 for PXI
You can frequency lock to an external reference clock source of 1 MHz and
from 5–20 MHz in 1 MHz increments. The PLL can lock to a signal level
of at least 1 V
pk-pk
.
Caution
Do
not
increase the voltage level of the clock signal at the PLL reference input
connector by more than the specified limit, 5 V
pk-pk
.
Note
If two or more NI 5401 devices are locked to each other using the same reference
clock, they are frequency locked, but the phase relationship is indeterminate.
Analog Filter Correction
The NI 5401 can correct for slight deviations in the flatness of the
frequency characteristic of the analog lowpass filter in its
passband
,
as shown in Figure 2-13. Curve A shows a typical lowpass filter curve.
The response of the filter is stored in an onboard
EEPROM
in 1 MHz
increments up to 16 MHz. Curve C is the correction applied to the
frequency response. The resulting Curve B is a flat response over the entire
passband. If you want to generate a sine wave at a particular frequency with
filter correction applied, you have to specify that frequency through your
software.
80 MHz
Div/8
VCXO
PXI
Bus
10 MHz
Loop
Filter
CAL
DAC
PLL Ref
(1 V
pk-pk
min)
Control
Voltage
10 MHz Osc
Source
Phase
Comp
AMUX