CompactRIO cRIO-9066/cRIO-9067 Operating Instructions
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© National Instruments
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13
You can configure the chassis to launch an embedded stand-alone LabVIEW Real-Time
application each time you boot the controller. Refer to the
Running a Stand-Alone Real-Time
Application (RT Module)
topic of the
LabVIEW Help
for more information.
If you have downloaded a bitfile to the chassis, it will be autoloaded by default at startup. If you
want to disable bitfile autoloading, use the
Disable FPGA Startup App
setting in MAX.
Controller Startup Options
You can configure controller startup options in MAX. Select the controller under
Remote
Systems
in the MAX configuration tree and click the
System Settings
tab. You can configure
the following options under
Startup Settings
.
Safe Mode
When you reboot the controller with this setting on, the controller starts without launching
LabVIEW Real-Time or any startup applications. In safe mode the controller launches only the
services necessary for updating configuration and installing software.
Console Out
When you reboot the controller with this setting on, the controller redirects output to the RS-232
serial port. You can use a serial-port terminal program to read the IP address and firmware
version of the controller. Use a null-modem cable to connect the serial port to a computer. Ensure
that the serial-port terminal program is configured to the following settings:
•
115,200 bits per second
•
Eight data bits
•
No parity
•
One stop bit
•
No flow control
Disable RT Startup App
When you reboot the controller with this setting on, LabVIEW Real-Time startup applications
do not run.
Enable Secure Shell (SSH) Login
When you reboot the controller with this setting on,
sshd
starts on the controller. Starting
sshd
enables logging in over SSH, an encrypted communication protocol. For information about SSH,
visit
ni.com/info
and enter the Info Code
openssh
.
Disable FPGA Startup App
When you reboot the controller with this setting on, FPGA applications do not autoload.
Caution
When you reset the cRIO-906
x
controller either programmatically or by
using the Reset button, you also reset the FPGA. All FPGA I/O lines are tri-stated
after a reset, and will enter predefined states once loaded.