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Chapter 4

Signal Connections

6034E/6035E User Manual

4-34

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Figure 4-29 shows the timing requirements for the GPCTR0_SOURCE 
signal.

Figure 4-29.  

GPCTR0_SOURCE Signal Timing

The maximum allowed frequency is 20 MHz, with a minimum pulse width 
of 23 ns high or low. There is no minimum frequency limitation.

The 20 MHz or 100 kHz timebase normally generates the 
GPCTR0_SOURCE signal unless you select some external source.

GPCTR0_GATE Signal

Any PFI pin can externally input the GPCTR0_GATE signal, which is 
available as an output on the PFI9/GPCTR0_GATE pin.

As an input, the GPCTR0_GATE signal is configured in the edge-detection 
mode. You can select any PFI pin as the source for GPCTR0_GATE and 
configure the polarity selection for either rising or falling edge. You can use 
the gate signal in a variety of different applications to perform actions such 
as starting and stopping the counter, generating interrupts, saving the 
counter contents, and so on.

As an output, the GPCTR0_GATE signal reflects the actual gate signal 
connected to general-purpose counter 0. This is true even if the gate is 
being externally generated by another PFI. This output is set to tri-state at 
startup. Figure 4-30 shows the timing requirements for the 
GPCTR0_GATE signal.

t

p

t

w

t

w

t

p

t

w

= 50 ns minimum

= 23 ns minimum

Summary of Contents for 6034E

Page 1: ...DAQ 6034E 6035E User Manual Multifunction I O Boards for PCI PXI and CompactPCI Bus Computers 6034E 6035E User Manual July 1999 Edition Part Number 322339A 01...

Page 2: ...1 48 14 24 24 Germany 089 741 31 30 Hong Kong 2645 3186 India 91805275406 Israel 03 6120092 Italy 02 413091 Japan 03 5472 2970 Korea 02 596 7456 Mexico D F 5 280 7625 Mexico Monterrey 8 357 7695 Nethe...

Page 3: ...limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brough...

Page 4: ...nal Instruments Application Software 1 3 NI DAQ Driver Software 1 4 Register Level Programming 1 5 Optional Equipment 1 6 Chapter 2 Installation and Configuration Software Installation 2 1 Hardware In...

Page 5: ...for Floating Signal Sources RSE Configuration 4 16 Single Ended Connections for Grounded Signal Sources NRSE Configuration 4 16 Common Mode Signal Rejection Considerations 4 17 Analog Output Signal Co...

Page 6: ...tion 5 2 External Calibration 5 2 Other Considerations 5 3 Appendix A Specifications Appendix B Custom Cabling and Optional Connectors Appendix C Common Questions Appendix D Technical Support Resource...

Page 7: ...e 4 15 TRIG1 Input Signal Timing 4 24 Figure 4 16 TRIG1 Output Signal Timing 4 24 Figure 4 17 TRIG2 Input Signal Timing 4 25 Figure 4 18 TRIG2 Output Signal Timing 4 26 Figure 4 19 STARTSCAN Input Sig...

Page 8: ...ix 6034E 6035E User Manual Tables Table 3 1 Available Input Configurations 3 2 Table 3 2 Measurement Precision 3 3 Table 3 3 Pins Used by PXI E Series Device 3 8 Table 4 1 I O Connector Signal Descrip...

Page 9: ...or a specific software version This icon denotes a note which alerts you to important information This icon to the left of bold italicized text denotes a caution which advises you of precautions to ta...

Page 10: ...al National Instruments Application Note 025 Field Wiring and Noise Considerations for Analog Signals PCI Local Bus Specification Revision 2 1 PICMG CompactPCI 2 0 Revision 2 1 PXI Bus Specification R...

Page 11: ...esolution of 50 ns The DAQ STC makes possible such applications as buffered pulse generation equivalent time sampling and seamless changing of the sampling rate With other DAQ devices you cannot easil...

Page 12: ...ses and PXI The standard implementation for CompactPCI does not include these sub buses Your PXI E Series device will work in any standard CompactPCI chassis adhering to PICMG CompactPCI 2 0 R2 1 core...

Page 13: ...er chassis before removing the device from the package Remove the device from the package and inspect the device for loose components or any other sign of damage Notify National Instruments if the dev...

Page 14: ...that can be used in popular spreadsheet programs and word processors Using ComponentWorks LabVIEW LabWindows CVI or VirtualBench software will greatly reduce the development time for your data acquis...

Page 15: ...1 1 Figure 1 1 The Relationship between the Programming Environment NI DAQ and Your Hardware Register Level Programming The final option for programming any National Instruments DAQ hardware is to wri...

Page 16: ...shielded screw terminals RTSI bus cables SCXI modules and accessories for isolating amplifying exciting and multiplexing signals for relays and analog output With SCXI you can condition and acquire up...

Page 17: ...u are a register level programmer refer to the PCI E Series Register Level Programmer Manual and the DAQ STC Technical Reference Manual for software configuration information Hardware Installation Not...

Page 18: ...y be used if the device is installed in a slot that supports bus arbitration or bus master cards National Instruments recommends installing the device in such a slot The PXI specification requires all...

Page 19: ...ard PCI Local Bus Specification Revision 2 1 The PXI device is fully compatible with the PXI Specification Revision 1 0 These specifications let your computer automatically set the device base memory...

Page 20: ...GIA Calibration Mux Analog Mode Multiplexer Analog Input Muxes Voltage REF Calibration DACs Calibration DACs DAC0 DAC1 NOT ON 6034E Analog Output DAQ STC Analog Input Timing Control Analog Output Timi...

Page 21: ...hs of the three configurations refer to the Analog Input Signal Overview section in Chapter 4 Signal Connections Input Range The devices have a bipolar input range that changes with the programmed gai...

Page 22: ...mV signal is connected to channel 1 and suppose the PGIA is programmed to apply a gain of one to channel 0 and a gain of 100 to channel 1 When the multiplexer switches to channel 1 and the PGIA switc...

Page 23: ...035E only These devices supply two channels of 12 bit analog output voltage at the I O connector The bipolar range is fixed at 10 V Data written to the digital to analog converter DAC will be interpre...

Page 24: ...be controlled by other devices and circuits There are a total of 13 timing signals internal to the DAQ STC that can be controlled by an external source These timing signals can also be controlled by s...

Page 25: ...ternal timing signal For example if you need the UPDATE signal as an output on the I O connector software can turn on the output driver for the PFI5 UPDATE pin Device and RTSI Clocks Many device funct...

Page 26: ...es can drive any of eight timing signals onto the RTSI bus and can receive any of these timing signals This signal connection scheme is shown in Figure 3 3 for PCI devices and Figure 3 4 for PXI devic...

Page 27: ...e 3 3 Pins Used by PXI E Series Device PXIE Series Signal PXI Pin Name PXI J2 Pin Number RTSI 0 5 PXI Trigger 0 5 B16 A16 A17 A18 B18 C18 RTSI 6 PXI Star D17 RTSI Clock PXI Trigger 7 E16 Reserved LBL...

Page 28: ...SH6850 shielded cable or R6850 ribbon cable Caution Connections that exceed any of the maximum ratings of input or output signals on the devices can damage the device and the computer Maximum input r...

Page 29: ...AIGND ACH4 AIGND ACH3 ACH10 AIGND ACH1 ACH8 DGND 1 Not available on the 6034E PFI8 GPCTR0_SOURCE PFI7 STARTSCAN GPCTR1_OUT PFI4 GPCTR1_GATE PFI3 GPCTR1_SOURCE PFI2 CONVERT DGND DGND DGND EXTSTROBE SC...

Page 30: ...tput channel 0 DAC1OUT1 AOGND Output Analog Channel 1 Output This pin supplies the voltage output of analog output channel 1 AOGND Analog Output Ground The analog output voltages are referenced to thi...

Page 31: ...Output PFI2 Convert As an input this is one of the PFIs As an output this is the CONVERT AI Convert signal A high to low edge on CONVERT indicates that an A D conversion is occurring PFI3 GPCTR1_SOUR...

Page 32: ...t of the scan PFI8 GPCTR0_SOURCE DGND Input Output PFI8 Counter 0 Source As an input this is one of the PFIs As an output this is the GPCTR0_SOURCE signal This signal reflects the actual source connec...

Page 33: ...s AOGND AO DGND DO VCC DO 0 1 Short circuit to ground 1A fused DIO 0 7 DIO Vcc 0 5 13 at Vcc 0 4 24 at 0 4 1 1 50 k pu SCANCLK DO 3 5 at Vcc 0 4 5 at 0 4 1 5 50 k pu EXTSTROBE DO 3 5 at Vcc 0 4 5 at 0...

Page 34: ...ence point Some examples of floating signal sources are outputs of transformers thermocouples battery powered devices optical isolators and isolation amplifiers An instrument or device that has an iso...

Page 35: ...een 1 and 100 mV but can be much higher if power distribution circuits are not properly connected If a grounded signal source is improperly measured this difference may appear as an error in the measu...

Page 36: ...ur device if necessary The PGIA applies gain and common mode voltage rejection and presents high input impedance to the analog input signals connected to your device Signals are routed to the positive...

Page 37: ...E Floating Signal Source Not Connected to Building Ground Grounded Signal Source Examples Ungrounded Thermocouples Signal conditioning with isolated outputs Battery devices Examples Plug in instrument...

Page 38: ...ch signal uses two multiplexer inputs one for the signal and one for its reference signal Therefore with a differential configuration for every channel up to eight analog input channels are available...

Page 39: ...put Connections for Ground Referenced Signals With this type of connection the PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and t...

Page 40: ...shows two bias resistors connected in parallel with the signal leads of a floating signal source If you do not use the resistors and the source is truly floating the source is not likely to remain wi...

Page 41: ...pled noise Also this configuration does not load down the source other than the very high input impedance of the PGIA You can fully balance the signal path by connecting another resistor of the same v...

Page 42: ...F input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions Using your software you can configure the channels for two different t...

Page 43: ...put of the PGIA and the signal local ground reference is connected to the negative input of the PGIA The ground point of the signal should therefore be connected to the AISENSE pin Any potential diffe...

Page 44: ...ce In these cases the PGIA can reject any voltage caused by ground potential differences between the signal source and the device In addition with differential input connections the PGIA can reject co...

Page 45: ...the voltage output signal for analog output channel 0 DAC1OUT is the voltage output signal for analog output channel 1 AOGND is the ground reference signal for both analog output channels and the exte...

Page 46: ...outputs Figure 4 9 shows signal connections for three typical digital I O applications Figure 4 9 Digital I O Connections Figure 4 9 shows DIO 0 3 configured for digital input and DIO 4 7 configured f...

Page 47: ...uch signal connections All external control over the timing of your device is routed through the 10 programmable function inputs labeled PFI 0 9 These signals are explained in detail in the section Pr...

Page 48: ...e each of the PFI pins to output a specific internal timing signal For example if you need the CONVERT signal as an output on the I O connector software can turn on the output driver for the PFI2 CONV...

Page 49: ...signals are SCANCLK EXTSTROBE TRIG1 TRIG2 STARTSCAN CONVERT AIGATE and SISOURCE Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received A typica...

Page 50: ...gnal Timing EXTSTROBE Signal EXTSTROBE is an output only signal that generates either a single pulse or a sequence of eight pulses in the hardware strobe mode An external device can use this signal to...

Page 51: ...sition is being externally triggered by another PFI The output is an active high pulse with a pulse width of 50 to 100 ns This output is set to tri state at startup Figures 4 15 and 4 16 show the inpu...

Page 52: ...counter decrements to zero it is loaded with the number of posttrigger scans to acquire while the acquisition continues The device ignores the TRIG2 signal if it is asserted prior to the scan counter...

Page 53: ...ou select internally triggered CONVERT As an output the STARTSCAN signal reflects the actual start pulse that initiates a scan This is true even if the starts are being externally triggered by another...

Page 54: ...tes the STARTSCAN signal unless you select some external source This counter is started by the TRIG1 signal and is stopped either by software or by the sample counter Scans generated by either an inte...

Page 55: ...ects the actual convert pulse that is connected to the ADC This is true even if the conversions are being externally generated by another PFI The output is an active low pulse with a pulse width of 50...

Page 56: ...can occur In the edge detection mode the first active edge disables the STARTSCAN signal and the second active edge enables STARTSCAN The AIGATE signal can neither stop a scan in progress nor continu...

Page 57: ...e PFI6 WFTRIG pin As an input the WFTRIG signal is configured in the edge detection mode You can select any PFI pin as the source for WFTRIG and configure the polarity selection for either rising or f...

Page 58: ...ction mode You can select any PFI pin as the source for UPDATE and configure the polarity selection for either rising or falling edge The selected edge of the UPDATE signal updates the outputs of the...

Page 59: ...d by software or the internal Buffer Counter D A conversions generated by either an internal or external UPDATE signal do not occur when gated by the software command register gate UISOURCE Signal Any...

Page 60: ...GPCTR0_UP_DOWN GPCTR1_SOURCE GPCTR1_GATE GPCTR1_OUT GPCTR1_UP_DOWN and FREQ_OUT GPCTR0_SOURCE Signal Any PFI pin can externally input the GPCTR0_SOURCE signal which is available as an output on the P...

Page 61: ...PCTR0_GATE pin As an input the GPCTR0_GATE signal is configured in the edge detection mode You can select any PFI pin as the source for GPCTR0_GATE and configure the polarity selection for either risi...

Page 62: ...both options This output is set to tri state at startup Figure 4 31 shows the timing of the GPCTR0_OUT signal Figure 4 31 GPCTR0_OUT Signal Timing GPCTR0_UP_DOWN Signal This signal can be externally...

Page 63: ...ge As an output the GPCTR1_SOURCE monitors the actual clock connected to general purpose counter 1 This is true even if the source clock is being externally generated by another PFI This output is set...

Page 64: ...ing edge You can use the gate signal in a variety of different applications to perform such actions as starting and stopping the counter generating interrupts saving the counter contents and so on As...

Page 65: ...ng requirements for the GPCTR1_OUT signal Figure 4 34 GPCTR1_OUT Signal Timing GPCTR1_UP_DOWN Signal This signal can be externally input on the DIO7 pin and is not available as an output on the I O co...

Page 66: ...source signal The gate must be valid either high or low for at least 10 ns before the rising or falling edge of a source signal for the gate to take effect at that source edge as shown by tgsu and tgh...

Page 67: ...ect the accuracy of measurements made with your device if you do not take proper care when running signal wires between signal sources and the device The following recommendations apply mainly to anal...

Page 68: ...a close distance To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other Do not run signal lines thr...

Page 69: ...least accurate whereas the last level is the slowest most difficult and most accurate Loading Calibration Constants Your device is factory calibrated before shipment at approximately 25 C to the level...

Page 70: ...which is discussed in the following section If you are interested primarily in relative measurements you can ignore a small amount of gain error and self calibration should be sufficient External Cali...

Page 71: ...to that channel This calibration mechanism is designed to work only with the internal 10 V reference Thus in general it is not possible to calibrate the analog output gain error when using an externa...

Page 72: ...put Input Characteristics Number of channels 16 single ended or 8 differential software selectable per channel Type of ADC Successive approximation Resolution 16 bits 1 in 65 536 Sampling rate 200 kS...

Page 73: ...e FS Negative FS 24 Hours 90 Days 1 Year V Single Pt Averaged C Theoretical Averaged 10 10 0 0496 0 0516 0 0538 1591 885 77 9 0 0010 305 2 102 5 5 5 0 0146 0 0166 0 0188 806 443 38 9 0 0005 152 6 51 2...

Page 74: ...stgain error after calibration 305 V max Postgain error before calibration 70 3 mV max Gain error relative to calibration reference After calibration gain 1 74 ppm of reading max Before calibration 18...

Page 75: ...1 10 2 LSB 5 s max System noise LSBrms including quantization Crosstalk DC to 100 kHz Adjacent channels 75 dB Other channels 90 dB Stability Recommended warm up time 15 min Offset temperature coeffic...

Page 76: ...tiplying FIFO buffer size none Data transfers DMA interrupts programmed I O DMA modes Scatter gather Single transfer demand transfer Accuracy Information Transfer Characteristics Relative accuracy INL...

Page 77: ...ibration 0 75 of output max Voltage Output Range 10 V Output coupling DC Output impedance 0 1 max Current drive 5 mA max Protection Short circuit to ground Power on state steady state 200 mV Initial p...

Page 78: ...l logic levels Power on state Input High Z 50 k pull up to 5 VDC Data transfers Programmed I O Timing I O Number of channels 2 up down counter timers 1 frequency scaler Resolution Counter timers 24 bi...

Page 79: ...pulse duration 10 ns in edge detect mode Min gate pulse duration 10 ns in edge detect mode Data transfers DMA interrupts programmed I O DMA modes Scatter gather Single transfer demand transfer Trigge...

Page 80: ...ctor Power available at I O connector 4 65 to 5 25 VDC at 1 A Physical Dimensions not including connectors PCI devices 17 5 by 10 6 cm 6 9 by 4 2 in PXI devices 16 0 by 10 0 cm 6 3 by 3 9 in I O conne...

Page 81: ...70 C Relative humidity 5 to 95 noncondensing PXI 6035E only Non operational random vibration 5 to 500 Hz 2 5 grms 3 axes Note Random vibration profiles were developed in accordance with MIL T 28800E...

Page 82: ...to the ground reference at the source You should route the analog lines separately from the digital lines When using a cable shield use separate shields for the analog and digital halves of the cable...

Page 83: ...6 ACH13 AIGND ACH4 AIGND ACH3 ACH10 AIGND ACH1 ACH8 DGND 1 Not available on the 6034E PFI8 GPCTR0_SOURCE PFI7 STARTSCAN GPCTR1_OUT PFI4 GPCTR1_GATE PFI3 GPCTR1_SOURCE PFI2 CONVERT DGND DGND DGND EXTST...

Page 84: ...OURCE PFI6 WFTRIG GPCTR1_OUT PFI3 GPCTR1_SOURCE PFI1 TRIG2 EXTSTROBE 5 V DGND DIO3 DIO2 DIO1 DIO0 AOGND DAC1OUT1 AISENSE ACH7 ACH6 ACH5 ACH4 ACH3 ACH2 ACH1 ACH0 AIGND FREQ_OUT PFI7 STARTSCAN PFI5 UPDA...

Page 85: ...ions two 24 bit counters The groups can be configured independently with timing resolutions of 50 ns or 10 s With the DAQ STC you can interconnect a wide variety of internal timing signals to other in...

Page 86: ...ave connected a differential input signal but my readings are random and drift rapidly What s wrong Check your ground reference connections Your signal may be referenced to a level that is considered...

Page 87: ...rsion comes from PFI5 as follows If you are using NI DAQ call Select_Signal deviceNumber ND_IN_CONVERT ND_PFI_5 ND_HIGH_TO_LOW If you are using LabVIEW invoke AI Clock Config VI with clock source code...

Page 88: ...internal signals to the I O connector route external signals to internal timing sources or tie internal timing signals together If you are using NI DAQ with LabVIEW and you want to connect external s...

Page 89: ...ons FAQs and their corresponding answers or solutions including special sections devoted to our newest products The database is updated daily in response to new customer experiences and feedback Troub...

Page 90: ...offices maintain a Web site to provide information on local services You can access these Web sites from www natinst com worldwide If you have trouble connecting to our Web site please contact your l...

Page 91: ...Meanings Value p pico 10 12 n nano 10 9 micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 t tera 1012 Numbers Symbols percent positive of or plus negative of or minus per degree ohm A A amperes...

Page 92: ...Integrated Circuit a proprietary semiconductor component designed and manufactured to perform a set of specific functions for a specific customer asynchronous 1 hardware a property of an event that o...

Page 93: ...ignals can be single ended or differential For digital signals you group channels to form ports Ports usually consist of either four or eight digital channels channel clock the clock controlling the t...

Page 94: ...analog DAC digital to analog converter an electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current DAC0OUT analog channel 0 output s...

Page 95: ...g else DMA is the fastest method of transferring data to from computer memory DNL differential nonlinearity a measure in least significant bit of the worst case deviation of code widths from their ide...

Page 96: ...data can be stored on the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device filtering a type of signal conditioning th...

Page 97: ...ause it is defined by ANSI IEEE Standards 488 1978 488 1 1987 and 488 2 1987 grounded measurement system See referenced single ended configuration H h hour half power bandwidth the frequency range ove...

Page 98: ...e Instrument drivers are available in several forms ranging from a function callable language to a virtual instrument VI in LabVIEW instrumentation amplifier a circuit whose output voltage with respec...

Page 99: ...to your application are linked in while those object modules that are not relevant are not linked linearity the adherence of device response to the equation R KS where R response S stimulus and K a c...

Page 100: ...nonreferenced signal sources are batteries transformers or thermocouples NRSE nonreferenced single ended mode All measurements are made with respect to a common NRSE measurement system reference but...

Page 101: ...er Plug and Play devices devices that do not require DIP switches or jumpers to configure resources on the devices also called switchless devices port 1 a communications connection on a computer or a...

Page 102: ...o called grounded measurement system relative accuracy a measure in LSB of the accuracy of an ADC It includes all non linearity and quantization errors It does not include offset and gain errors of th...

Page 103: ...e number of scans scan one or more analog or digital input samples Typically the number of input samples in a scan is equal to the number of channels in the input group For example one pulse from the...

Page 104: ...R signal to noise ratio the ratio of the overall rms signal level to the rms noise level expressed in decibels software trigger a programmed event that triggers an event such as data acquisition softw...

Page 105: ...and set up operations the maximum rate at which the hardware can operate TRIG trigger signal trigger any event that causes or starts some form of data capture TTL transistor transistor logic a digital...

Page 106: ...or software elements typically used with a PC that has the functionality of a classic stand alone instrument 2 a LabVIEW software module VI which consists of a front panel user interface and a block d...

Page 107: ...analog input modes common questions C 2 to C 3 input range measurement precision table 3 3 overview 3 2 to 3 3 multichannel scanning considerations 3 3 to 3 4 signal connections 4 9 to 4 17 signal ov...

Page 108: ...d answers common mode signal rejection considerations 4 17 CompactPCI using with PXI 1 2 ComponentWorks software 1 3 configuration common questions C 2 hardware configuration 2 3 connectors See I O co...

Page 109: ...connections 4 23 description table 4 3 I O signal summary table 4 6 F field wiring considerations 4 40 to 4 41 floating signal sources description 4 7 differential connections 4 13 to 4 14 single end...

Page 110: ...analog input modes input range exceeding common mode input ranges caution 4 9 measurement precision table 3 3 overview 3 2 to 3 3 installation common questions C 2 hardware 2 1 to 2 2 software 2 1 un...

Page 111: ...signal description table 4 5 I O signal summary table 4 7 PFI9 GPCTR0_GATE signal description table 4 5 I O signal summary table 4 7 PFIs programmable function inputs common questions C 4 signal routi...

Page 112: ...ns A 8 S sampling rate C 1 SCANCLK signal DAQ timing connections 4 23 description table 4 3 I O signal summary table 4 6 scanning multichannel 3 3 to 3 4 settling time in multichannel scanning 3 3 to...

Page 113: ...output A 5 to A 7 accuracy information A 5 dynamic characteristics A 6 output characteristics A 5 stability A 7 transfer characteristics A 5 to A 6 voltage output A 6 calibration A 8 to A 9 digital I...

Page 114: ...6 RTSI triggers 3 7 to 3 8 TRIG1 signal 4 23 to 4 24 TRIG2 signal 4 25 to 4 26 triggers See digital trigger specifications RTSI triggers U UISOURCE signal 4 32 to 4 33 unpacking 6025E devices 1 3 UPD...

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