NAiS FP1, Hardware Manual

Page: 253 / 280

245
8-7. FP1 CPU Version 2.7
8-7. FP1 CPU Version 2.7
We pursue a policy of continuing improvement in the design and performance of our products. Therefore, some
aspects of FP1 design and performance may change from time to time. Such changes and improvements are
identifiable by the CPU version.
In this chapter, differences between CPU version 2.7 and earlier version are clarified.
Note:
FP1 CPU Ver. 2.7 Additional Functions
Notes:
•
*
An FP Programmer
II
or NPST-GR Software version 3.1 or later is required to perform these functions.
• ** NPST-GR Software Ver. 3.0 or earlier cannot perform this function.
Function
Timer/Counter instruction SV setting *
Pulse output frequency range selection
Error address recognition function (DT9017 and DT9018)
Error clearance from the programming tool *
Error clearance by the F148 instruction
36 comparison instructions (ST =, AN <, etc.) *
Modem control function (system registers 411 and 416) *
Operation without backup battery enabled **
C24/C40 series
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
C56/C72 series
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
2.7 or later
C14/C16 series
2.7 or later
2.7 or later
2.7 or later
2.7 or later
Not available
• The CPU version is printed on the identification label of each FP1. The identification label is located on
the back of the Control Unit.