Mylex DAC960PG, Installation Manual

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Functional Description
Manual No. 771971 2-3
The NVRAM stores data on the current configuration of the controller and
its attached disk drives, and lists of pending write operations issued to any
redundant drives. As the configurations change (for example, when a drive
fails), the NVRAM keeps a record of the changes. These data are checksum
protected so that after a power failure, the controller will recall the
configuration and will restore consistency for all outstanding writes on
restart.
Figure 2-2. DAC960PG Controller Block Diagram
PCI Bus Interface
The PCI bus interface is contained in the Intel 80960RP intelligent I/O
processor, and conforms to PCI Specification Rev 2.1. The RP in the i960
RP designation specifically means that such an interface is included on the
chip (as opposed to other i960s). The i960 RP connects directly to the
primary PCI bus and is a bridge to the secondary PCI bus. The primary and
secondary PCI busses are clocked at PCI bus speed. The secondary PCI bus
interfaces with up to three Mylex BA81C15 PCI to Ultra-SCSI host adapter
ASICs. Each BA81C15 is dedicated to one Ultra-SCSI channel.