Motorola PPC/CPCI-690, Reference Manual

Page: 142 / 176

Device Bus Buses
5 - 14 PPC/CPCI-690
Device Bus
The device bus is a 32-bit wide multiplexed bus that is used for connecting
boot and user flash memory, RTC/NVRAM, IPMI controller and board
registers that are implemented in logic.
Boot Flash
Boot flash memory consists of two 8-bit wide 512 KByte flash devices. The
boot block memory range is write-protected (default) and can be repro-
grammed on-board (see “fprog” page 4-39). Write protection can be
removed and the boot flash address space can be exchanged via switch set-
ting (see Table 7 “Switch Settings” page 2-14).
User Flash
The user flash consists of four 8-bit wide flash devices offering up to
64 MByte user flash memory. 32 MBytes are implemented on the orderable
variants per default. 64 MBytes of user flash memory are available as an
assembly option.
The user flash memory is write-enabled by default and can be repro-
grammed on-board (see “Programming the User Flash” page 4-8). Write
protection can be enabled via switch setting (see Table 7 “Switch Settings”
page 2-14).
RTC/NVRAM
The board carries a device where 8-bit wide non-volatile SRAM (NVRAM)
for backup functionality of 32 KByte size and a real time clock (RTC) are
implemented.
Device Type Boot Flash Memory Address Space
M29W040B-90K1 0 FFF00000..FFF7FFFF
1 FFF80000..FFFFFFFF
Device Type Memory Address Space
E28F640J3A-120 (64 Mbit)
E28F128J3A-150 (128 Mbit) 32 MByte: F4000000..F5FF.FFFF (default)
64 MByte: F4000000..F7FF.FFFF