Motorola PPC/CPCI-690, Reference Manual, Page: 18 / 176

xviii PPC/CPCI-690
216049 AC January 2003 corrected “ Power Requirements ” page 2-6,
corrected note in “ Hardware Upgrades and
Accessories
” page 2-8 and “
IDE Devices
”
page 2-12,
changed SW1-4 from Abort Key to
Reserved and SW4-4 from EndurX CO 21k
system relevant switch to reserved in
Table 7 “Switch Settings” page 2-14,
removed section “Abort Key” from “
Key
”
page 3-5 and all front panel drawings,
changed description of I2C bus 2 in “The
device bus is a 32-bit wide multiplexed bus
that is used for connecting boot and user
flash memory, RTC/NVRAM, IPMI con-
troller and board registers that are imple-
mented in logic.” page 5-14,
changed description of Table 21 “Slave
Addresses of Devices Attached to IPMI
Controller’s I2C Buses” page 5-17,
removed description of Table 22 “On-
Board I2C Devices” page 5-18,
changed RTB BIB to RTB ID-ROM in
Table 23 “Off-Board I2C Devices” page 5-
18,
modified Figure 18 “Connection to I2C
Devices” page 5-19,
added section “
Interrupt Map
” page 6-6,
added bit 6 to “ LED Control Register ”
page 6-10,
removed row from table Table 22 “On-
Board I2C Devices” page 5-18,
added sentence to “
SENTINEL I2C Bus ”
page 5-19,
editorial changes
221400 AA September
2003 Added IPMI firmware upgrade procedure
In “Environmental Requirements”:
updated requirements for vibration
Updated list of deliverable board variants
Order No. Revision Date Description