Motorola PL3307, Integration Manual

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1 - 2 PL3307 Decoder Integration Guide
Theory of Operation
During image capture:
1.
The image sensor array in the imager engine captures an image of the bar code through the engine’s
optical lens. If necessary, the engine automatically adjusts illumination, exposure, and other parameters to
obtain the best quality image.
2.
The imager engine sends the image to the PL3307 decoder board.
3.
The PL3307 processes the image to identify the target bar code(s), decodes them, and transmits the
decoded data to the host.
Set various parameters provided in this guide to adjust the performance of the imager engine and PL3307 to
match the application or desired usage profile.
PL3307 Decoder
Figure 1-1 provides a block diagram for the decoder.
Figure 1-1
PL3307 Decoder Block Diagram
Atmel AT91SAM9G20 Processor
The digital system is built on an Atmel AT91SAM9G20, a RISC processor based on ARM v5TEJ architecture.
The major features of the core are:
•
CPU clock speed up to 400 MHz with external LP SDRAM bus speed of 133 MHz.
•
32 KB instruction/32 KB data cache, 256 KB instruction cache, 32 KB internal SRAM.
Full Speed
USB (FFC)
HOST
INTERFACE
16 MHz
XTAL
On-Board
Regulation and
Supply Control
Application
Processor
400 MHz
Atmel
AT91SAM9G20
Power
Miscellaneous
Signaling
I
2
C Command
and Control
Camera Port
ENGINE
INTERFACE
PL3307
1 Gbit NAND Flash
512 Mbit SDRAM
RS-232
Miscellaneous
Signaling
Full Speed
USB (uUSB)
Power