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© Copyright 2001 Motorola, Inc.

All rights reserved.

Printed in the United States of America.

Motorola and the Motorola symbol are registered trademarks of Motorola, Inc.

PowerPC and the PowerPC logo are registered trademarks of International Business
Machines Corporation and are used by Motorola, Inc. under license from International
Business Machines Corporation.

PC•MIP is a trademark of SBS GreenSpring Modular I/O, Inc.

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All other products mentioned in this document are trademarks or registered trademarks of
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Summary of Contents for MVME2100

Page 1: ...MVME2100 Single Board Computer Installation and Use V2100A IH2 July 2001 Edition ...

Page 2: ... are registered trademarks of International Business Machines Corporation and are used by Motorola Inc under license from International Business Machines Corporation PC MIP is a trademark of SBS GreenSpring Modular I O Inc I2 C is a registered trademark of Philips Semiconductors All other products mentioned in this document are trademarks or registered trademarks of their respective holders ...

Page 3: ...ide the Equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Service personnel should not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the po...

Page 4: ...losion if battery is replaced incorrectly Replace battery only with the same or equivalent type recommended by the equipment manufacturer Dispose of used batteries according to the manufacturer s instructions Attention Il y a danger d explosion s il y a remplacement incorrect de la batterie Remplacer uniquement avec une batterie du même type ou d un type équivalent recommandé par le constructeur M...

Page 5: ...efforts have been made to assure the accuracy of this document Motorola Inc assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes Electronic ve...

Page 6: ...d to in writing by Motorola Inc Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3 of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Motorola Inc Computer Group 2900 South Diablo Way Tempe Arizona 85282 ...

Page 7: ...Unpacking the MVME2100 Hardware 1 4 Preparing the MVME2100 Hardware 1 4 MVME2100 Configuration Settings 1 4 Setting Flash Memory Bank A Bank B Header J9 Pins 1 and 2 1 5 Setting System Controller Selection Header J2 1 5 PMCs 1 6 PMCspan 1 6 System Console Terminal 1 6 Installing the MVME2100 Hardware 1 7 ESD Precautions 1 8 PMCs PC MIPs 1 8 Primary PMCspan 1 11 Secondary PMCspan 1 14 MVME2100 Syst...

Page 8: ...troller 3 4 PCI Bus Arbitration 3 4 PCI Local Bus 3 5 Interrupt Controller 3 5 Two Wire Serial Interface 3 6 I2O Message Unit 3 6 Direct Memory Access DMA 3 6 Timers 3 6 System Clock Generator 3 7 Flash Memory 3 7 System Memory 3 7 Ethernet Interface 3 8 Asynchronous Serial Port 3 8 VMEbus Interface 3 9 PCI Mezzanine Card Slot 3 9 PC MIP Type I Mezzanine Card Slots 3 9 PC MIP Type II Mezzanine Car...

Page 9: ...1 Configuring the VMEbus Interface 5 12 Firmware Command Buffer 5 16 APPENDIX A Related Documentation Motorola Computer Group Documents A 1 Manufacturers Documents A 2 Related Specifications A 5 APPENDIX B Specifications Specifications B 1 Mechanical Characteristics B 1 Electrical Characteristics B 1 Environmental Characteristics B 2 EMC Compliance B 3 Thermal Validation B 4 Thermally Significant ...

Page 10: ...MIP User Defined I O Connectors C 5 PCI Mezzanine Card PMC PCI Interface Connectors C 6 PMC User Defined I O Connector C 8 PCI Expansion Connector C 10 10BaseT 100BaseTx Connector C 13 Asynchronous Serial Port Connector C 13 Two Wire Serial Interface Header C 14 APPENDIX D Troubleshooting Solving Startup Problems D 1 ...

Page 11: ... PMCspan 001 Installation on an MVME2100 1 13 Figure 1 6 PMCspan 010 Installation on a PMCspan 001 MVME2100 1 15 Figure 2 1 System Boot up Sequence 2 2 Figure 3 1 MVME2100 Block Diagram 3 3 Figure 3 2 Asynchronous Serial Port Connections 3 8 Figure B 1 Thermally Significant Components Primary Side B 6 Figure B 2 Thermally Significant Components Secondary Side B 7 Figure B 3 Mounting a Thermocouple...

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Page 13: ...tions B 2 Table B 3 Thermally Significant Components B 5 Table C 1 P2 Connector Pin Assignment C 1 Table C 2 PC MIP P1 P2 Pin Assignments C 3 Table C 3 PC MIP Slot 2 User Defined I O Connector P3 Pin Assignments C 5 Table C 4 PMC Connector J11 J12 Pin Assignments C 6 Table C 5 PMC User Defined I O Connector J14 Pin Assignments C 8 Table C 6 PCI Expansion Connector Pin Assignments C 10 Table C 7 10...

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Page 15: ...mory IEEE 1101 Injector Ejector MVME2112 1 MPC8240 250MHz 64MB SDRAM 9 MB Flash Memory VME Scanbe MVME2112 3 64MB SDRAM 9 MB Flash Memory IEEE 1101 Injector Ejector Part Number Description PMCSPAN 001 Primary PCI expansion mates directly to the MVME2100 providing slots for either two single wide or one double wide IEEE P1386 1 compatible front panel with injector ejector handles PMCSPAN1 001 PMCSP...

Page 16: ...r 3 Functional Description provides an explanation of the functional components on the MVME2100 The chapter includes a listing of the MVME2100 features and a block diagram The remainder of the chapter includes specific descriptions of each functional element on the board and a description of its functional characteristics Chapter 4 PPCBug Firmware describes the PPCBug debugger and diagnostics firm...

Page 17: ...elated connectors associated with the MVME2100 Appendix D Troubleshooting provides a brief explanation of the possible resolutions for basic error conditions Comments and Suggestions Motorola welcomes and appreciates your comments on its documentation We want to know what you think about our manuals and how we can make them better Mail comments to Motorola Computer Group Reader Comments DW164 2900...

Page 18: ...r system output for example screen displays reports examples and system prompts Enter Return or CR CR represents the carriage return or Enter key CTRL represents the Control key Execute control characters by pressing the Ctrl key and the letter simultaneously for example Ctrl d Terminology A character precedes a data or address parameter to specify the numeric format as follows if not specified th...

Page 19: ... active or true negation and negate indicate a signal that is inactive or false These terms are used independently of the voltage level high or low that they represent Data and address sizes are defined as follows Byte 8 bits numbered 0 through 7 with bit 0 being the least significant Half word 16 bits numbered 0 through 15 with bit 0 being the least significant Word 32 bits numbered 0 through 31 ...

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Page 21: ...ack PC MIP I O cards can be installed on the MVME2100 Additional capacity can be provided by adding primary and secondary PMCspan modules to the MVME2100 SBC Instructions for installing the PMC and PC MIP boards are included in this chapter as are instructions for installing the PMCspan modules and the MVME2100 into a VME chassis The following list of equipment may be used in an MVME2100 system PM...

Page 22: ...ion for PCI I O when using the 5 row VME64 extension connector will be pin out compatible with the MVME2100 PC MIP Expansion To maximize I O expansion flexibility the MVME2100 provides a combination of Type I and Type II PC MIP slots for added capability The MVME2100 provides one Type I PC MIP slot with rear I O via the P2 connector and two Type II PC MIP slots with front panel I O The two Type II...

Page 23: ...ne connections It requires a single slot except when PMCspan carrier boards are used Allow one extra slot for each PMCspan System Console Terminal In normal operation connection of a debug console terminal is required only if you intend to use the MVME2100 s debug firmware PPCbug interactively An RJ45 connector is provided on the front panel of the board for this purpose ...

Page 24: ...cessary to perform certain modifications before and after installing it The following paragraphs discuss the preparation of the MVME2100 hardware components prior to installing them into a chassis and connecting them MVME2100 Configuration Settings The MVME2100 provides software control over most options by setting bits in control registers After installing it in a system you can modify its config...

Page 25: ...ler Selection Header J2 The MVME2100 is factory configured in automatic system controller mode jumper is installed across pins 2 and 3 of header J2 This means that the MVME2100 determines if it is the system controller at system power up or reset by its position on the bus if it is in slot 1 on the VME system it configures itself as the system controller Remove the jumper from J2 if you intend to ...

Page 26: ...span PMC Adapter Carrier Board Installation and Use manual for instructions Referenced in Appendix System Console Terminal Ensure that the appropriate jumper s are set in the correct position on the MVME2100 board This is necessary when the PPCBug firmware is used Connect the terminal via a cable to the RJ45 DEBUG connector Refer to Appendix C for pin signal assignments Set up the terminal as foll...

Page 27: ...ME2100 Hardware The following section discusses installing PMCs and PMCspan modules onto the MVME2100 installing the MVME2100 into a VME chassis and connecting an optional system console terminal Figure 1 1 MVME2100 Layout J2 PMCspan INTERFACE PMC SLOTS TYPE I I PC MIP SLOTS J9 TYPE II PC MIP SLOTS ...

Page 28: ... available at electronics stores that is attached to an active electrical ground Note that a system chassis may not be grounded if it is unplugged PMCs PC MIPs PMC modules and PC MIP cards mount on top of the MVME2100 SBC Perform the following steps to install a PMC module and or a PC MIP card on your MVME2100 Warning Dangerous voltages capable of causing death are present in this equipment Use ex...

Page 29: ... or system cover s as necessary for access to the VME modules 3 If the MVME2100 has already been installed in a VMEbus card slot carefully remove it as shown in the figure below and place it with connectors P1 and P2 facing you Figure 1 2 MVME2100 Installation and Removal From a VMEbus Chassis 4 Remove the filler plate s from the front panel of the MVME2100 If installing both PMC and PC MIP s remo...

Page 30: ...nectors J11 J12 J14 or if installing a PC MIP position the card s mating connectors on top of the MVME2100 s Type II PC MIP connectors P41 P42 or P31 P32 for Type II or P21 P22 P23 for Type I PC MIP Note As a reminder Type I PC MIP cards without I O can also be installed on the MVME2100 s Type II PC MIP connectors Figure 1 3 Typical Single width PMC Module Placement on an MVME2100 ...

Page 31: ...nto the mating standoffs on the MVME2100 and tighten the screws Primary PMCspan To install a PMCspan 001 PCI expansion module on your MVME2100 refer to the PMCspan PMC Adapter Carrier Board Installation and Use manual listed in Related Documentation on page A 1 refer to Figure 1 5 on page 1 13 and perform the following steps Warning Dangerous voltages capable of causing death are present in this e...

Page 32: ...g to the instructions given in the PMCspan and PMC manuals 1 Attach an ESD strap to your wrist Attach the other end of the ESD strap to the chassis as a ground The ESD strap must be secured to your wrist and to ground while you are performing the installation procedure 2 Perform an operating system shutdown Turn the AC or DC power off and remove the AC cord or DC power lines from the system Remove...

Page 33: ...Installing the MVME2100 Hardware http www motorola com computer literature 1 13 1 Figure 1 5 PMCspan 001 Installation on an MVME2100 2081 9708 MVME2100 PMCspan ...

Page 34: ...t the corners of the PMCspan and into the standoffs on the MVME2100 Tighten the screws Secondary PMCspan The PMCspan 010 PCI expansion module mounts on top of a PMCspan 001 PCI expansion module To install a PMCspan 010 on your MVME2100 refer to Figure 1 6 on page 1 15 and perform the following steps Note This procedure assumes that you have read the user s manual that was furnished with the PMCspa...

Page 35: ...Installing the MVME2100 Hardware http www motorola com computer literature 1 15 1 Figure 1 6 PMCspan 010 Installation on a PMCspan 001 MVME2100 2065 9708 P3 J3 ...

Page 36: ...ly from the VMEbus card slots and position it with the P1 and P2 connectors facing you 4 Remove the four short Phillips head screws from the standoffs in each corner of the primary PCI expansion module PMCspan 001 5 Attach the four standoffs to the PMCspan 001 6 Place the PMCspan 010 on top of the PMCspan 001 Align the mounting holes to the standoffs in each corner and align PMCspan 010 connector ...

Page 37: ...ttach an ESD strap to your wrist Attach the other end of the ESD strap to the chassis as a ground The ESD strap must be secured to your wrist and to ground throughout the procedure 2 Perform an operating system shutdown a Turn the AC or DC power off and remove the AC cord or DC power lines from the system b Remove chassis or system cover s as necessary for access to the VMEmodules 3 Remove the fil...

Page 38: ...feature for automatic propagation of the IACK and BG signals Step 6 does not apply to such backplane designs 6 On the chassis backplane remove the INTERRUPT ACKNOWLEDGE IACK and BUS GRANT BG jumpers from the header for the card slot occupied by the MVME2100 7 If you intend to use PPCBug interactively connect the terminal that is to be used as the PPCBug system console to the DEBUG port on the fron...

Page 39: ...he MVME2100 tries to access off board resources that do not respond to its cycle and the MVME2100 is not the system controller and the system does not have a global bus time out the MVME2100 waits indefinately for the VMEbus cycle to complete This will cause the system to lock up There is only one situation in which the system might lack this global bus time out when the MVME2100 is not the system...

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Page 41: ...s is performed by the PPCBug firmware power up or system reset The firmware initializes the devices on the MVME2100 module in preparation for booting the operating system The firmware is shipped from the factory with an appropriate set of defaults In most cases there is no need to modify the firmware configuration before you boot the operating system Refer to Chapter 5 Modifying the Environment fo...

Page 42: ...p Sequence STARTUP INITIALIZATION MONITOR BOOTING POST Power up reset initialization Initialize devices on the MVME2100 Power On Self Test diagnostics Firmware configured boot mechanism Interactive command driven on line PowerPC debugger when terminal connected if so configured Default is no boot ...

Page 43: ...dard MVME2100 front panel and the PMCspan front panel Switches There are two switches ABT and RST and three LED light emitting diode status indicators BFL SYS RUN located on the MVME2100 front panel ABT S1 When activated by firmware the Abort switch ABT can generate an interrupt signal from the base board to the processor at a user programmable level The interrupt is normally used to abort program...

Page 44: ... Status Register 2 SYS DS2 The green SYS LED indicates CPU activity when illuminated this indicator signifies that the MVME2100 is functioning as the VMEbus System Controller RUN DS3 The green RUN LED illuminates when either ROM FLASH SDRAM or PCI accesses are occurring 10 100 BASE T Port The RJ45 port on the front panel of the MVME2100 labeled 10 100 BASE T supplies the Ethernet LAN 10BaseT 100Ba...

Page 45: ...llaneous Control Register MISC_CTL in the Universe ASIC SYSRESET remains asserted for at least 200 ms as required by the VMEbus specification The DEBUG port may be used for connecting a terminal to the MVME2100 to serve as the firmware console for the factory installed debugger PPCBug The port is configured as follows 8 bits per character 1 stop bit per character Parity disabled no parity Baud rat...

Page 46: ...tory Test Header I2C Signals Reserved N A J7 Programming Header ISPLI Reserved N A J8 RiscWatch JTAG Reserved N A J9 Software Readable Header Support for Processor Emulation Pins 1 2 For PPCBug use only Pins 1 2 ON Use Soldered On Flash Memory Devices OFF Use Memory in Sockets U1 U8 U13 U15 Note PPCBug uses Bit 7 while booting to determine whether to continue executing from socketed Flash or jump ...

Page 47: ...anual for the particular PMC PCI Mezzanine Card The right most lower opening labeled PCI MEZZANINE CARD on the MVME2100 front panel provides front panel I O access to a PMC that is connected to the 64 pin connectors J11 J12 and J14 on the MVME2100 Connector J14 allows rear panel P2 I O Refer to Appendix C Connector Pin Assignmentsfor additional information on pin assignments TYPE II PC MIP The lef...

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Page 49: ...Flash ROM 4 or 8MB expansion Flash ROM one 10BaseT 100BaseTx Ethernet port and one front panel accessible asynchronous serial port The following table lists the key features of the MVME2100 Table 3 1 MVME2100 Features Feature Description Processor MPC8240 Bus clock frequencies of 66 67 83 33 MHz Flash Memory Sockets for 1MB 8 bit plus 4MB or 8MB 64 bit of expansion Flash memory System Memory 32 or...

Page 50: ...face One 16550 compatible async serial port PCI Mezzanine Card One 32 bit PMC slot Front panel I O MVME2300 compatible P2 I O PC MIP One 32 bit Type I PC MIP slots MVME2300 compatible P2 I O Two 32 bit Type II PC MIP slots front panel I O PCI Expansion Genesis II PCI expansion compatibility Miscellaneous RESET switch ABORT switch Front panel status indicators Form Factor Standard 6U VME Table 3 1 ...

Page 51: ...d Computer Figure 3 1 MVME2100 Block Diagram RJ45 Front Panel RJ45 I O I O I O Debug Connector Clock Generator MPC8240 SCC 16550 RTC NVRAM M48T59 DRAM 32 64MB 32 bit PCI Local Bus ETHERNET DEC21143 LXT970 Flash 5 9MB PC MIP TYPE II Slot 2 PC MIP TYPE II Slot 1 Universe II PMC Slot PC MIP TYPE I Slot 2 P2 CPU P1 EEPROM VME PHY PCI Expansion Connector ...

Page 52: ...n integrated PCI host bridge and memory controller which provides the bridge function between the internal MPC60x bus and the external PCI local bus The processor supports a 32 bit PCI interface that is compliant with the PCI Local Bus Specification Revision 2 1 Additional features of the processor include PReP or CHRP compatible memory maps DRAM control refresh 3 3 5 0V compatible I O power manag...

Page 53: ...IP Type II boards one DEC21143 Ethernet controller one PCI VMEbus bridge and one DEC21150 PCI to PCI Bridge Interrupt Controller The MVME2100 uses the Embedded Programmable Interrupt Controller EPIC integrated into the processor to manage locally generated interrupts The interrupt controller will operate in the serial interrupt mode Currently defined external interrupting devices include DEC21143 ...

Page 54: ...t Memory Access DMA The MVME2100 provides DMA capability through a two channel DMA controller integrated into the processor s peripheral device Each DMA channel is capable of performing local memory to local memory PCI memory to local memory local memory to PCI memory and PCI memory to PCI memory data transfers Both DMA channels can be accessed by the local CPU as well as external PCI bus masters ...

Page 55: ...up to 1024KB of Flash memory and resides at address 0xFFF00000 and is restricted to 8 bits in width Bank A may be populated with four 512Kx16 Flash devices to obtain 4MB of 64 bit wide expansion Flash memory or four 1Mx16 Flash devices to obtain 8MB of 64 bit wide Flash memory The expansion Flash memory starts at address 0xFF000000 System Memory System memory for the MVME2100 is provided by 2 bank...

Page 56: ...ed to the Ethernet controller The Ethernet station address is displayed on a label affixed to the board In addition the Ethernet address is stored in the configuration ROM interfaced to the Ethernet controller Asynchronous Serial Port The MVME2100 uses a TL16C550 or compatible Universal Asynchronous Receiver Transmitter UART with a 1 8432 MHz input clock to provide an asynchronous serial interface...

Page 57: ...Mezzanine Size S1B Single width standard depth 75mm x 150mm with front panel PMC Connectors J11 J12 J14 32 Bit PCI with front panel and user defined I O Signalling Voltage Vio 5 0V PC MIP Type I Mezzanine Card Slots The MVME2100 provides one dedicated Type I PC MIP slot User defined I O as defined in the PC MIP specification is provided for the Type I PC MIP card slot via the VMEbus P2 connector P...

Page 58: ...r boards up to four additional PMC boards can be used Real Time Clock NVRAM The ST Thomson M48T59 is used by the MVME2100 to provide 8KB of non volatile static RAM and a real time clock It consists of two parts A 28 pin 330mil SO device which contains the RTC the oscillator 8KB of SRAM and gold plated sockets for the SNAPHAT battery A SNAPHAT battery that houses the crystal and the battery Note Re...

Page 59: ... commands A complete list of PPCBug commands appears at the end of the chapter For full user information about PPCBug refer to the PPCBug Firmware Package User s Manual and the PPCBug Diagnostics Manual listed in Appendix A Related Documentation PPCBug Basics The PowerPC debug firmware known as the PPCBug is a powerful evaluation and debugging tool for systems built around the Motorola PowerPC mic...

Page 60: ...interface or debug diagnostics monitor that accepts commands from the system console terminal When using PPCBug you operate out of either the debugger directory or the diagnostic directory If you are in the debugger directory the debugger prompt PPC5 Bug is displayed and you have all of the debugger commands at your disposal If you are in the diagnostic directory the diagnostic prompt PPC5 Diag is...

Page 61: ...keted 32 pin PLCC Flash devices that together provide 1MB of storage The executable code is checksummed at every power on or reset firmware entry The result which includes a precalculated checksum contained in the flash devices is verified against the expected checksum MPU Hardware and Firmware Initialization The debugger performs the MPU hardware and firmware initialization process This process o...

Page 62: ...ory 16 Enables the MPU s instruction cache 17 Copies the MPU s exception vector table from 0xFFF00000 to 0x00000000 18 Verifies MPU type 19 Enables the superscalar feature of the MPU superscalar processor boards only 20 Verifies the external bus clock speed of the MPU 21 Determines the debugger s console host ports and initializes the UART 22 Displays the debugger s copyright message 23 Displays a...

Page 63: ...f so configured Default is no boot 35 Executes the debugger monitor i e issues the PPC5 Bug prompt Using PPCBug PPCBug is command driven it performs its various operations in response to commands that you enter at the keyboard When the PPC5 Bug prompt appears on the screen the debugger is ready to accept debugger commands When the PPC5 Diag prompt appears on the screen the debugger is ready to acc...

Page 64: ...PPCBug Firmware Package User s Manual listed in Appendix A Related Documentation A debugger command is made up of the following parts The command name either uppercase or lowercase e g MD or md Any required arguments as specified by command At least one space before the first argument Precede all other arguments with either a space or comma One or more options Precede an option or a string of opti...

Page 65: ...ock of Memory Initialize BM Block of Memory Move BS Block of Memory Search BR Breakpoint Insert BV Block of Memory Verify CACHE Modify Cache State CM Concurrent Mode CNFG Configure Board Information Block CS Checksum a Block of data CSAR PCI Configuration Space READ Access CSAW PCI Configuration Space WRITE Access DC Data Conversion and Expression Evaluation DS Disassembler DU Dump S Records ECHO ...

Page 66: ... GN Go to Next Instruction GO Go Execute User Program GT Go to Temporary Breakpoint HE Help on Command s IBM Indirect Block Move IDLE Idle Master MPU IOC I O Control for Disk IOI I O Inquiry IOP I O Physical to Disk IOT I O Teach for Configuring Disk Controller IRD Idle MPU Register Display IRM Idle MPU Register Modify IRS Idle MPU Register Set LO Load S Records from Host M Alias for MM Command MA...

Page 67: ...ating System NIOC Network I O Control NIOP Network I O Physical NIOT I O Teach for Configuring Network Controller NOBR Breakpoint Delete NOCM No Concurrent Mode NOMA Macro Delete NOMAL Disable Macro Expansion Listing NOPA Printer Detach NOPF Port Detach NORB No ROM Boot NOSYM Detach Symbol Table NPING Network Ping OF Offset Registers Display Modify PA Printer Attach PBOOT Bootstrap Operating Syste...

Page 68: ...ROMboot Enable RD Register Display REMOTE Remote RESET Cold Warm Reset RL Read Loop RM Register Modify RS Register Set RUN MPU Execution Status SD Switch Directories SET Set Time and Date SROM SROM Examine Modify SYM Symbol Table Attach SYMS Symbol Table Display Search T Trace TA Terminal Attach TIME Display Time and Date TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S Records Aga...

Page 69: ...y the debugger prompt PPC5 Bug is displayed and all of the debugger commands are available Diagnostics commands cannot be entered at the PPC5 Bug prompt If you are in the diagnostic directory the diagnostic prompt PPC5 Diag is displayed and all of the debugger and diagnostic commands are available PPCBug s diagnostic test groups are listed in Table 4 2 Note that not all tests are performed on the ...

Page 70: ...2 Diagnostic Test Groups Test Group Description EPIC EPIC Timers Test PHB PCI Bridge Revision Test RAM RAM Tests various HOSTDMA DMA Transfer Test RTC MK48Txx Real Time Clock Tests UART Serial Input Output Tests Register IRQ Baud Loopback Z8536 Z8536 Counter Timer Tests SCC Serial Communications Controller Z85C230 Tests PAR8730x Parallel Interface PC8730x Test KBD8730x PC8730x Keyboard Mouse Tests...

Page 71: ...rameters Use the PPCBug command ENV to change configurable PPCBug parameters in NVRAM The CNFG and ENV commands are both described in the PPCBug Firmware Package User s Manual Refer to that manual for general information about their use and capabilities The following paragraphs present additional information aboutCNFG and ENV Some paragraphs may provide examples of MVME2100 information but the maj...

Page 72: ...to indicate the size of the string Parameters that are not quoted are considered data strings and data strings are right justified The data strings are padded with zeroes if the length is not met The Board Information Block is factory configured before shipment There is no need to modify block parameters unless the NVRAM is corrupted Refer to the PPCBug Firmware Package User s Manual for a descrip...

Page 73: ...NV are Bug or System environment B S B Maximum Memory Usage Mb 0 AUTO 1 This parameter specifies the maximum number of megabytes the bug is allowed to use Allocation begins at the top of physical memory and expands downward as more memory is required until the maximum value is reached If a value of zero is specified memory will continue to be increased as needed until half of the available memory ...

Page 74: ...upported I O Controllers Y N Y Y Display the field service menu N Do not display the field service menu Default G Use the Global Control and Status Register to pass and start execution of the cross loaded program M Use the Multiprocessor Control Register MPCR in shared RAM to pass and start execution of the cross loaded program B Use both the GCSR and the MPCR methods to pass and start execution o...

Page 75: ...ck Default N NVRAM header space will not be initialized automatically during board initialization Y Enable PReP style network booting same boot image from a network interface as from a mass storage device N Do not enable PReP style network booting Default Y Negate the VMEbus SYSFAIL signal during board initialization N Negate the VMEbus SYSFAIL signal after successful completion or entrance into t...

Page 76: ...AM boot list will delay before starting the boot The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key The time value is from 0 255 seconds Default 5 seconds Auto Boot Enable Y N N W Wide SCSI 16 bit bus N Narrow SCSI 8 bit bus Default Y Give boot priority to devices defined in the fw boot path global environment variable GEV N Do not give boot priority ...

Page 77: ...al for a listing of disk tape devices currently supported by PPCBug Default 0x00 Auto Boot Partition Number 00 Which disk partition is to be booted as specified in the PowerPC Reference Platform PReP specification If set to zero the firmware will search the partitions in order 1 2 3 4 until it finds the first bootable partition That is then the partition that will be booted Other acceptable values...

Page 78: ...ower up only Y N Y ROM Boot Enable search of VMEbus Y N N ROM Boot Abort Delay 5 The time in seconds that the ROMboot sequence will delay before starting the boot The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key The time value is from 0 255 seconds Default 5 seconds ROM Boot Direct Starting Address FFF00000 The first location tested when PPCBug sear...

Page 79: ...fault 0x00 Network Auto Boot Abort Delay 5 The time in seconds that the NETboot sequence will delay before starting the boot The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key The time value is from 0 255 seconds Default 5 seconds Network Auto Boot Configuration Parameters Offset NVRAM 00001000 The address where the network interface configuration par...

Page 80: ...Boot Configuration Parameters Offset from its default of 0x00001000 to the value you need to be clear of your data within NVRAM Memory Size Enable Y N Y Memory Size Starting Address 00000000 The default Starting Address is 0x00000000 Memory Size Ending Address 02000000 The default Ending Address is the calculated size of local memory If the memory start is changed from 0x00000000 this value will a...

Page 81: ...trol registers in the PIBC PCI ISA bus bridge controller The ENV parameter is a 32 bit value that is divided by 4 to yield the values for route control registers PIRQ0 1 2 3 The default is determined by system type LED Serial Startup Diagnostic Codes These codes can be displayed at key points in the initialization of the hardware devices If the debugger fails to come up to a prompt the last code d...

Page 82: ...rface for the MVME2100 To perform this configuration you should have a working knowledge of the Universe ASIC as described in your MVME2100 Programmer s Reference Guide VME3PCI Master Master Enable Y N Y PCI Slave Image 0 Control 00000000 The configured value is written into the LSI0_CTL register of the Universe chip PCI Slave Image 0 Base Address Register 00000000 The configured value is written ...

Page 83: ...Universe chip PCI Slave Image 2 Control C0410000 The configured value is written into the LSI2_CTL register of the Universe chip PCI Slave Image 2 Base Address Register A0000000 The configured value is written into the LSI2_BS register of the Universe chip PCI Slave Image 2 Bound Address Register A2000000 The configured value is written into the LSI2_BD register of the Universe chip PCI Slave Imag...

Page 84: ... Register Local DRAM Size The configured value is written into the VSI0_BD register of the Universe chip The value is the same as the Local Memory Found number already displayed VMEbus Slave Image 0 Translation Offset 00000000 The configured value is written into the VSI0_TO register of the Universe chip VMEbus Slave Image 1 Control 00000000 The configured value is written into the VSI1_CTL regist...

Page 85: ...0 The configured value is written into the VSI3_CTL register of the Universe chip VMEbus Slave Image 3 Base Address Register 00000000 The configured value is written into the VSI3_BS register of the Universe chip VMEbus Slave Image 3 Bound Address Register 00000000 The configured value is written into the VSI3_BD register of the Universe chip VMEbus Slave Image 3 Translation Offset 00000000 The co...

Page 86: ...d buffer The default value of this parameter causes a startup delay of 5 seconds Firmware Command Buffer NULL terminates entry The Firmware Command Buffer contents contain the BUG commands which are executed upon firmware startup BUG commands you will place into the command buffer should be typed just as you enter the commands from the command line The string NULL on a new line terminates the comm...

Page 87: ... sales office Visiting MCG s World Wide Web literature site http www motorola com computer literature Table A 1 Motorola Computer Group Documents Document Title Motorola Publication Number MVME2100 Single Board Computer Programmer s Reference Manual V2100A PG PPCBug User s Manual Part 1 PPCBug User s Manual Part 2 PPCBUGA1 UM PPCBUGA2 UM PPCBug Diagnostics Users Manual PPCDIAA UM PMCspan PMC Adapt...

Page 88: ...hone 800 441 2447 or 303 675 2140 WebSite http e www motorola com webapp DesignCenter E mail ldcformotorola hibbertco com MPC8240UM D PowerPC 603 RISC Microprocessor User s Manual Motorola Literature Distribution Center Telephone 800 441 2447 or 303 675 2140 WebSite http e www motorola com webapp DesignCenter E mail ldcformotorola hibbertco com OR IBM Microelectronics PowerPC603 EM603e User Manual...

Page 89: ...02 04 08 16 2 Wire Serial CMOS E2 PROM Atmel Corporation 2325 Orchard Parkway San Jose CA 95131 408 441 0311 http www atmel com atmel support AT24C04 M48T59Y CMOS 8Kx8 Timekeeper SRAM ST Microelectronics formerly SGS Thomson Microelectronics 1000 East Bell Road Phoenix AZ 85022 http eu st com stonline index shtml M48T59Y Intel Corporation previously DIGITAL Semiconductor 21143 PCI CardBus 10 100 M...

Page 90: ... Site A Intel Corporation previously DIGITAL Semiconductor 21143 PCI CardBus 10 100 Mb s Ethernet LAN Controller Data Sheet http developer intel com design network datashts 278074 htm N A Table A 2 Manufacturers Documents Continued Document Title Publication Number ...

Page 91: ... Electrical and Electronics Engineers Inc Publication and Sales Department 345 East 47th Street New York New York 10017 21633 Telephone 1 800 678 4333 http standards ieee org catalog P1386 1 Draft 2 0 Peripheral Component Interconnect PCI Local Bus Specification Revision 2 0 2 1 2 2 PCI Special Interest Group P O Box 14070 Portland Oregon 97214 4070 Marketing Help Line Telephone 503 696 6111 Docum...

Page 92: ... 445 Hoes Lane P O Box 1331 Piscataway NJ 08855 1331 http standards ieee org catalog P1386 1 Draft 2 0 Common Mezzanine Card Specification IEEE Standards Department 445 Hoes Lane P O Box 1331 Piscataway NJ 08855 1331 http standards ieee org catalog P1386 Draft 2 0 PCI Interface Specification Rev 2 1 PCI Special Interest Group 503 696 2000 http www pcisig com PCI Rev 2 1 Table A 3 Related Specifica...

Page 93: ... factor Electrical Characteristics The estimated power requirements for the MVME2100 are as follows Notes The power requirement listed for the MVME2100 does not include the power requirements for the PMC or PC MIP slots The PMC specification allows for 7 5 watts per PMC slot The PC MIP specification does not limit maximum power per slot A total of 15 watts can be drawn from any combination of the ...

Page 94: ...ature Operating Nonoperating 0 C to 55 C 32 F to 131 F Inlet air temperature with 250 LFM minimum airflow 40 C to 70 C 32 F to 148 F Relative Humidity Operating Nonoperating 5 to 90 noncondensing 5 to 95 noncondensing Vibration Operating Nonoperating 1 0 G sine sweep 5 0 200 Hz 0 25 octaves min 0 5 G sine sweep 5 50 Hz 0 1 octaves min 3 0 G sine sweep 50 500 Hz 0 25 octaves min ...

Page 95: ...rovides the path for connecting shields to earth ground Front panel screws properly tightened All peripherals were EMC compliant For minimum RF emissions it is essential that the conditions above be implemented Failure to do so could compromise the EMC compliance of the equipment containing the module The MVME2100 is a board level product and meant to be used in standard VME applications As such i...

Page 96: ...cant components and lists the corresponding maximum allowable component operating temperatures It also provides example procedures for component level temperature measurements Thermally Significant Components Table B 3 on page B 5 summarizes components that exhibit significant temperature rises These are the components that should be monitored in order to assess thermal performance The table also ...

Page 97: ... Allowable Temperature Degrees C Measurement Location Junction Case or Air U9 PPC8240 250MHz 105 Junction U20 Intel 21143 70 Ambient U19 Level One LXT970ATC 110 Case U22 Tundra Universe 2 125 Junction U3 DRAM NEC D4564 70 Ambient U25 Lattice isp2032V 70 Ambient U1 AMD L160BT80VC 70 Ambient U6 P15C 16245A 80 Ambient U57 Lattice 2064V 100LT100 70 Ambient ...

Page 98: ...Thermal Validation B 6 Computer Group Literature Center Web Site B Figure B 1 Thermally Significant Components Primary Side U22 U25 U20 U9 U3 U6 U1 U19 ...

Page 99: ...Specifications http www motorola com computer literature B 7 B Figure B 2 Thermally Significant Components Secondary Side U57 ...

Page 100: ...nction Temperature Some components have an on chip thermal measuring device such as a thermal diode For instructions on measuring temperatures using the on board device refer to the MVME2100 Programmer s Reference Guide and to the component manufacturer s documentation listed in Appendix A Related Documentation Measuring Case Temperature Measure the case temperature at the center of the top of the...

Page 101: ...9 B Note Machining a heatsink base reduces the contact area between the heatsink and the electrical component You can partially compensate for this effect by filling the machined areas with thermal grease The grease should not contact the thermocouple junction ...

Page 102: ...ATSINK BOTTOM VIEW ISOMETRIC VIEW Machined groove for thermocouple wire routing Thermocouple junction bonded to component Heatsink base Thermal pad Through hole for thermocouple junction clearance may require removal of fin material Also use for alignment guidance during heatsink installation Machined groove for thermocouple wire routing ...

Page 103: ...ture by placing the thermocouple downstream of the component This method is conservative since it includes heating of the air by the component The following figure illustrates one method of mounting the thermocouple Figure B 4 Measuring Local Air Temperature Thermocouple junction PWB Tape thermocouple wire to top of component Air flow ...

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Page 105: ...nes and additional 16 VMEbus data lines Rows A C Z and D provide power and interface signals for the Type I PC MIP and or PMC mezzanine boards The pin assignments for connector P2 are as follows Table C 1 P2 Connector Pin Assignment Pin Row Z Row A Row B Row C Row D 1 PCMIP2 P3 59 PMC1 J14 2 5V PMC1 J14 1 PCMIP2 P3 60 2 GND PMC1 J14 4 GND PMC1 J14 3 PCMIP2 P3 57 3 PCMIP2 P3 55 PMC1 J14 6 NC PMC1 J...

Page 106: ...25 19 PCMIP2 P3 23 PMC1 J14 38 VD21 PMC1 J14 37 PCMIP2 P3 24 20 GND PMC1 J14 40 VD22 PMC1 J14 39 PCMIP2 J3 22 21 PCMIP2 J3 19 PMC1 J14 42 VD23 PMC1 J14 41 PCMIP2 J3 20 22 GND PMC1 J14 44 GND PMC1 J14 43 PCMIP2 J3 17 23 PCMIP2 J3 15 PMC1 J14 46 VD24 PMC1 J14 45 PCMIP2 J3 16 24 GND PMC1 J14 48 VD25 PMC1 J14 47 PCMIP2 J3 14 25 PCMIP2 J3 11 PMC1 J14 50 VD26 PMC1 J14 49 PCMIP2 J3 12 26 GND PMC1 J14 52 ...

Page 107: ...SVD 4 3 RSVD RSVD 4 5 12V TRST 6 5 5V 5V 6 7 TCK 12V 8 7 5V 5V 8 9 GND TMS 10 9 REQ64 ACK64 10 11 TDO TDI 12 11 3 3V 3 3V 12 13 5V 5V 14 13 AD00 AD01 14 15 5V INTA 16 15 AD02 GND 16 17 INTB INTC 18 17 GND AD03 18 19 INTD 5V 20 19 AD04 AD05 20 21 PRSNT1 RSVD 22 21 AD06 3 3V 22 23 RSVD 3 3V 24 23 3 3V AD07 24 25 PRSNT2 RSVD 26 25 C BE0 AD08 26 27 GND GND 28 27 GND GND 28 29 RSVD RSVD 30 29 AD09 M66E...

Page 108: ...NE PERR 48 49 AD25 GND 50 49 3 3V LOCK 50 51 3 3V AD24 52 51 STOP GND 52 53 C BE3 IDSEL 54 53 GND DEVSEL 54 55 AD23 3 3V 56 55 TRDY 3 3V 56 57 GND AD22 58 57 GND IRDY 58 59 AD21 AD20 60 59 FRAME GND 60 61 AD19 GND 62 61 3 3V C BE2 62 63 3 3V AD18 64 63 AD16 AD17 64 Table C 2 PC MIP P1 P2 Pin Assignments Continued ...

Page 109: ...2 3 PC MIP IO P2 Z29 PC MIP IO P2 D29 4 5 GND PC MIP IO P2 D28 6 7 PC MIP IO P2 Z27 PC MIP IO P2 D27 8 9 PC MIP IO P2 D26 GND 10 11 PC MIP IO P2 Z25 PC MIP IO P2 D25 12 13 GND PC MIP IO P2 D24 14 15 PC MIP IO P2 Z23 PC MIP IO P2 D23 16 17 PC MIP IO P2 D22 GND 18 19 PC MIP IO P2 Z21 PC MIP IO P2 D21 20 21 GND PC MIP IO P2 D20 22 23 PC MIP IO P2 Z19 PC MIP IO P2 D19 24 25 PC MIP IO P2 D18 GND 26 27 ...

Page 110: ...MIP IO P2 D6 GND 50 51 PC MIP IO P2 Z5 PC MIP IO P2 D5 52 53 GND PC MIP IO P2 D4 54 55 PC MIP IO P2 Z3 PC MIP IO P2 D3 56 57 PC MIP IO P2 D2 GND 58 59 PC MIP IO P2 Z1 PC MIP IO P2 D1 60 61 Not Connected Not Connected 62 63 Not Connected Not Connected 64 Table C 4 PMC Connector J11 J12 Pin Assignments Pin J11 Pin Pin J12 Pin 1 TCK 12V 2 1 12V TRST 2 3 GND INTA 4 3 TMS TDO 4 5 INTB INTC 6 5 TDI GND ...

Page 111: ... 32 33 FRAME GND 34 33 GND Not Used 34 35 GND IRDY 36 35 TRDY 3 3V 36 37 DEVSEL 5V 38 37 GND STOP 38 39 GND LOCK 40 39 PERR GND 40 41 SDONE SBO 42 41 3 3V SERR 42 43 PAR GND 44 43 C BE1 GND 44 45 5V Vio AD15 46 45 AD14 AD13 46 47 AD12 AD11 48 47 GND AD10 48 49 AD09 5V 50 49 AD08 3 3V 50 51 GND C BE0 52 51 AD07 Not Used 52 53 AD06 AD05 54 53 3 3V Not Used 54 55 AD04 GND 56 55 Not Used GND 56 57 5V ...

Page 112: ...PMC IO P2 C3 PMC IO P2 A3 6 7 PMC IO P2 C4 PMC IO P2 A4 8 9 PMC IO P2 C5 PMC IO P2 A5 10 11 PMC IO P2 C6 PMC IO P2 A6 12 13 PMC IO P2 C7 PMC IO P2 A7 14 15 PMC IO P2 C8 PMC IO P2 A8 16 17 PMC IO P2 C9 PMC IO P2 A9 18 19 PMC IO P2 C10 PMC IO P2 A10 20 21 PMC IO P2 C11 PMC IO P2 A11 22 23 PMC IO P2 C12 PMC IO P2 A12 24 25 PMC IO P2 C13 PMC IO P2 A13 26 27 PMC IO P2 C14 PMC IO P2 A14 28 29 PMC IO P2 ...

Page 113: ...47 PMC IO P2 C24 PMC IO P2 A24 48 49 PMC IO P2 C25 PMC IO P2 A25 50 51 PMC IO P2 C26 PMC IO P2 A26 52 53 PMC IO P2 C27 PMC IO P2 A27 54 55 PMC IO P2 C28 PMC IO P2 A28 56 57 PMC IO P2 C29 PMC IO P2 A29 58 59 PMC IO P2 C30 PMC IO P2 A30 60 61 PMC IO P2 C31 PMC IO P2 A31 62 63 PMC IO P2 C32 PMC IO P2 A32 64 Table C 5 PMC User Defined I O Connector J14 Pin Assignments Continued ...

Page 114: ...is connector are as follows Table C 6 PCI Expansion Connector Pin Assignments Pin Assignment Assignment Pin 1 3 3V GND 3 3V 2 3 PCICLK PMCINTA 4 5 GND PMCINTB 6 7 PURST PMCINTC 8 9 HRESET PMCINTD 10 11 TDO TDI 12 13 TMS TCK 14 15 TRST PCIXP 16 17 PCIXGNT PCIXREQ 18 19 12V 12V 20 21 PERR SERR 22 23 LOCK SDONE 24 25 DEVSEL SBO 26 27 GND GND 28 29 TRDY IRDY 30 31 STOP FRAME 32 33 GND GND 34 35 ACK64 ...

Page 115: ... BE3 C BE2 44 45 AD1 AD0 46 47 AD3 AD2 48 49 AD5 AD4 50 51 AD7 AD6 52 53 AD9 AD8 54 55 AD11 AD10 56 57 AD13 AD12 58 59 AD15 AD14 60 61 AD17 AD16 62 63 AD19 AD18 64 65 AD21 AD20 66 67 AD23 AD22 68 69 AD25 AD24 70 71 AD27 AD26 72 73 AD29 AD28 74 75 AD31 AD30 76 Table C 6 PCI Expansion Connector Pin Assignments Continued ...

Page 116: ...AD33 AD32 84 85 AD35 AD34 86 87 AD37 AD36 88 89 AD39 AD38 90 91 AD41 AD40 92 93 AD43 AD42 94 95 AD45 AD44 96 97 AD47 AD46 98 99 AD49 AD48 100 101 AD51 AD50 102 103 AD53 AD52 104 105 AD55 AD54 106 107 AD57 AD56 108 109 AD59 AD58 110 111 AD61 AD60 112 113 AD63 AD62 114 Table C 6 PCI Expansion Connector Pin Assignments Continued ...

Page 117: ...A standard RJ45 connector located on the front panel of the MVME2100 board provides the interface to the asynchronous serial port The pin assignments are as follows Table C 7 10BaseT 100BaseTx Connector Pin Assignments Pin Assignment 1 TD 2 TD 3 RD 4 No Connect 5 No Connect 6 RD 7 No Connect 8 No Connect Table C 8 Asynchronous Serial Connector Pin Assignments Pin Assignment 1 DCD input 2 RTS outpu...

Page 118: ...al Interface Header A 4 pin header on the MVME2100 board is used to support external two wire serial devices as a test aide The pin assignments for this connector are as follows Table C 9 Two Wire Serial Interface Header Pin Assignments Pin Assignment 1 5V 2 SCLK 3 SDATA 4 GND ...

Page 119: ...2 Check that the board is securely installed in its backplane or chassis 3 Check that all necessary cables are connected to the board per this manual Refer to Chapter 1 Preparation and Installation 4 Check for compliance with Installation Considerations per this manual Refer to Chapter 1 Preparation and Installation 5 Review the Installation and Startup procedures per this manual They include a st...

Page 120: ...m 2 Check that the proper debugger devices are installed 3 Reconnect power 4 Restart the system by double button reset press the RST and ABT switches at the same time release RST first wait seven seconds then release ABT 5 If the debug prompt appears go to step IV or step V as indicated If the debug prompt does not appear go to step VI B The board may need to be reset IV Debug prompt PPC5 Bug appe...

Page 121: ...ck speed and or Ethernet Address and then later return to env CR and step 3 7 Run the self tests by typing in st CR The tests take as much as 10 minutes depending on RAM size They are complete when the prompt returns The onboard self test is a valuable tool in isolating defects 8 The system may indicate that it has passed all the self tests Or it may indicate a test that failed If neither happens ...

Page 122: ...nnot be corrected using the steps given A There may be some fault in the board hardware or the on board debugging and diagnostic firmware 1 Document the problem and return the board for service 2 Phone 1 800 222 5640 TROUBLESHOOTING PROCEDURE COMPLETE Table D 1 Troubleshooting Problems Continued Condition Possible Problem Possible Resolution ...

Page 123: ... B 4 information block 5 2 placement 1 17 structure 5 2 Bug basics 4 1 C cables B 3 chassis rails grounding B 3 chassis VMEsystem 1 3 CNFG 5 2 commands debugger 4 6 PPCBug 4 5 conductive chassis rails B 3 configurable items MVME21xx base board 1 4 configurations MVME21xx xv configure PPCBug parameters 5 3 VMEbus interface 5 12 Configure Board Information Block CNFG 5 2 configuring PPCBug parameter...

Page 124: ...eed 5 10 E electrostatic discharge ESD 1 8 ENV Auto Boot Abort Delay 5 8 Auto Boot Controller 5 7 Auto Boot Default String 5 8 Auto Boot Device 5 7 Auto Boot Partition Number 5 7 command parameters 5 3 L2 Cache Parity Enable 5 11 Memory Size 5 10 Negate VMEbus SYSFAIL Always 5 5 Network Auto Boot Controller 5 9 NVRAM Bootlist 5 6 Primary SCSI Bus Negotiations 5 5 Primary SCSI Data Bus Width 5 6 SC...

Page 125: ...le 5 11 LED serial startup diagnostic codes 5 11 LEDs MVME210x 2 4 LEDs light emitting diodes MVME210x 2 3 lowercase 4 12 M memory requirements firmware 4 3 memory size 5 10 Memory Size Enable 5 10 MPU initialization 4 3 MVME210x installing 1 17 LEDs 2 4 status indicators 2 4 MVME21xx prior to installing 1 17 N Negate VMEbus SYSFAIL Always 5 5 NETboot enable 5 9 Network Auto Boot Controller 5 9 Ne...

Page 126: ...ebugger 4 11 R required equipment 1 1 resetting the system 2 4 restart mode 4 12 RF emissions B 3 ROMboot enable 5 8 5 11 RUN LED DS3 2 4 S SCSI bus reset on debugger startup 5 5 SD command 4 11 secondary PMCspan installing 1 14 Secondary SCSI identifier 5 6 set environment to bug operating system ENV 5 3 setup terminal 1 18 shielded cables see also cables B 3 specifications MVME2100 B 1 status in...

Page 127: ... X timeout global 1 19 troubleshooting procedures D 1 troubleshooting the MVME210x 4 11 U Universe VMEbus interface ASIC 2 5 unpacking the hardware 1 4 uppercase 4 12 V VMEbus interface 5 12 system controller selection header J9 1 5 VMEsystem enclosure 1 3 ...

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