MC9S12DT256 Device User Guide — V03.07
26
Figure 1-2 MC9S12DT256 Memory Map
* Assuming that a ‘0’ was driven onto port K bit 7 during MCU
$0400
$0000
$1000
$4000
$8000
$C000
$FF00
VECTORS
$FFFF
EXTERN
EXPANDED*
VECTORS
NORMAL
SINGLE CHIP
VECTORS
SPECIAL
SINGLE CHIP
REGISTERS
(Mappable to any 2k Block
within the first 32K)
$0000
$03FF
$0000
$0FFF
4K Bytes EEPROM
(Mappable to any 4K Block)
12K Bytes RAM
(Mappable to any 16K
$1000
$3FFF
and alignable to top or
bottom)
$4000
$7FFF
16K Fixed Flash
Page $3E = 62
(This is dependant on the
state of the ROMHM bit)
$8000
$BFFF
16K Page Window
16 x 16K Flash EEPROM
pages
$C000
$FFFF
16K Fixed Flash
Page $3F = 63
$FF00
$FFFF
BDM
(if active)
is reset into normal expanded wide or narrow mode.
Summary of Contents for MC9S12A256
Page 3: ...MC9S12DT256 Device User Guide 9S12DT256DGV3 D V03 07 3 ...
Page 4: ...MC9S12DT256 Device User Guide 9S12DT256DGV3 D V03 07 4 ...
Page 10: ...MC9S12DT256 Device User Guide V03 07 10 ...
Page 12: ...MC9S12DT256 Device User Guide V03 07 12 ...
Page 14: ...MC9S12DT256 Device User Guide V03 07 14 Table A 21 Expanded Bus Timing Characteristics 125 ...
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Page 131: ...MC9S12DT256 Device User Guide V03 07 131 User Guide End Sheet ...
Page 132: ...MC9S12DT256 Device User Guide V03 07 132 FINAL PAGE OF 132 PAGES ...