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M68EM05P18UM/D

MOTOROLA

General Description

9

General Description

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Emulation Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Emulation Module Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

Target Cable Assemblies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Connector Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

Target Cable Connector Pin Assignments . . . . . . . . . . . . . . . . . . .15
Logic Analyzer Connector Pin Assignments . . . . . . . . . . . . . . . . . .17

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Summary of Contents for M68EM05P18

Page 1: ...M68EM05P18UM D M68EM05P18 EMULATION MODULE USER S MANUAL ...

Page 2: ......

Page 3: ... Motorola Inc 1996 All Rights Reserved N O N D I S C L O S U R E A G R E E M E N T R E Q U I R E D M68EM05P18 Emulation Module User s Manual ...

Page 4: ... the failure of the Motorola product could create a situation where personal injury or death may occur Should Buyer purchase or use Motorola products for any such unintended or unauthorized application Buyer shall indemnify and hold Motorola and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arisin...

Page 5: ...5P18UM D MOTOROLA 5 Revision History This table summarizes differences between this revision and the previous revision of this emulation module user s manual Previous Revision None Current Revision Original release Date 06 96 ...

Page 6: ...Revision History M68EM05P18UM D 6 MOTOROLA ...

Page 7: ...rs and Switches 21 Clock Source Select Header W1 22 Reset Select Header W2 23 Port A Interrupt Mask Option Control Switch SW1 24 Remaining System Installation 25 Personality File Usage 26 MC68HC 8 05P18 Emulation 26 Mask Option Control 27 Port A Pullups Interrupts 28 Port C Bit 7 Sharing with the A D Subsystem 29 Programming the 128 Byte EEPROM Array 29 HC05EVS Configuration and Operation Contents...

Page 8: ...M D 8 Table of Contents MOTOROLA MC68HC 8 05P18 Emulation 38 Port A Pullups Interrupts 38 Mask Option Control 39 Port C Bit 7 Sharing with the A D Subsystem 40 HC05EVS Limitations 41 Schematics Contents 43 M68EM05P18 Schematics 43 ...

Page 9: ...tion 9 General Description Contents Introduction 10 Emulation Components 10 Emulation Module Layout 12 Target Cable Assemblies 13 Connector Information 15 Target Cable Connector Pin Assignments 15 Logic Analyzer Connector Pin Assignments 17 ...

Page 10: ...use as part of an MMDS05 or an MMEVS05 MMEVS08 follow the instructions given in MMDS MMEVS Configuration and Operation on page 19 To configure your M68EM05P18 for use as part of an HC05EVS follow instructions given in HC05EVS Configuration and Operation on page 31 Emulation Components Motorola s complete emulation system consists of the emulation module described in this manual as well as other se...

Page 11: ...lopment system MMDS05 The MMDS is a high performance development tool that has all the capabilities of the MMEVS In addition it also has a bus state analyzer and real time memory windows An HC05EVS platform board M68HC05EVS evaluation system An M68HC05EVS is a tool for designing and evaluating target systems This system is being replaced by the more advanced MMEVS Flex cable target assembly Refer ...

Page 12: ...ely purchased target cable assembly When you install the M68EM05P18 on the MMDS05 the target cable passes through the slit in the station module enclosure Connector J1 is used as a connection to a logic analyzer DIN connectors P1 and P2 connect the EM and a development system platform board Location XU5 is the resident MCU Switch SW1 enables or disables port A mask options A wirewrap area is at th...

Page 13: ...page 15 The drawings in Figure 2 represent a target cable assembly An assembly for 28 pin DIP packages consists of a flex cable and a target head adapter The assembly for 28 pin SOIC packages requires an additional SOIC adapter One end of the flex cable plugs onto M68EM05P18 connector J2 with orientation shown in Figure 2 The other end of the flex cable plugs into the target head adapter The targe...

Page 14: ...M68CBL05A TARGET HEAD ADAPTER M68TA05P9P28 TARGET HEAD ADAPTER TO TARGET HEAD ADAPTER TO TARGET SYSTEM DIP MCU SOCKET OR SOIC ADAPTER EMULATION MODULE FLEX CABLE TO EMULATION MODULE 28 PIN SOIC FLEX CABLE M68CBL05A TARGET HEAD ADAPTER M68TA05P9P28 DIP TO SOIC ADAPTER M68DIP28SOIC TO TARGET SYSTEM SOIC MCU FOOTPRINT DIP TO SOIC ADAPTER OPTIONAL ...

Page 15: ...to connect a logic analyzer Target Cable Connector Pin Assignments Figure 3 shows the pin assignments for connector J2 Table 1 lists signal descriptions for connector J2 Figure 3 Target Connector Pin Assignment 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 T_RST T_IRQ PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB5 SDO PB6 SDI PB7 SCK GND GND GND GND GND GND GND 1 3 5 7 9 11 13 15 17 19 21 23 25 27 ...

Page 16: ... MCU programmable timer system 9 TCMP TIMER COMPARE Output signal used by the output compare feature of the MCU programmable timer system 11 PD5 CKOUT PORT D bit 5 General purpose I O line controlled by software via data direction and data registers CLOCK OUTPUT If the clock output mask option is enabled this pin will become the buffered OSC2 clock 13 15 17 PC0 PC2 PORT C bits 0 2 General purpose ...

Page 17: ...ovides easy access to many of the signals used internally Table 2 lists signal descriptions for this connector Figure 4 Connector J1 Pin Assignments 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 GND NC GND LA12 LA13 NC NC AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 LIR NC NC E NC 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 NC NC LA11 LA10 LA9 LA8 LA7 LA6 LA5 LA4 LA3 LA2 LA1 LA0 LR W NC NC...

Page 18: ... 16 18 20 22 24 26 28 30 AD7 AD0 ADDRESS DATA BUS bits 7 0 MCU multiplexed address data bus 29 LR W LATCHED READ WRITE The MCU s write signal is latched and used on the platform board to control emulator memory accesses 32 LIR LOAD INSTRUCTION REGISTER Active low signal indicating an opcode fetch cycle is in process 37 VCC 5 Vdc POWER Connection to the system voltage VCC 38 E E CLOCK Internally ge...

Page 19: ...eaders and Switches 21 Clock Source Select Header W1 22 Reset Select Header W2 23 Port A Interrupt Mask Option Control Switch SW1 24 Remaining System Installation 25 Personality File Usage 26 MC68HC 8 05P18 Emulation 26 Mask Option Control 27 Port A Pullups Interrupts 28 Port C Bit 7 Sharing with the A D Subsystem 29 Programming the 128 Byte EEPROM Array 29 ...

Page 20: ... topics covered in this chapter are Setting M68EM05P18 Jumper Headers and Switches on page 21 explains how to set the M68EM05P18 jumper headers Remaining System Installation on page 25 covers the final steps to system installation Personality File Usage on page 26 discusses how the personality file is used on the M68EM05P18 board MC68HC 8 05P18 Emulation on page 26 explains considerations pertaini...

Page 21: ...ed oscillator located on the EM board at XY1 X Select the clock originating from the development system platform board The frequency is controlled by the OSC command and is 2 MHz on power up Selects a user supplied clock source The clock is input to connector J2 through a target cable assembly Reset Select W2 Always in this position for MMDS or MMEVS operation Enables software to control bidirecti...

Page 22: ... and COMMON selects the 4 MHz canned oscillator clock source at board location XY1 There are two other possible clock sources To use the one originating from the development system platform reposition the W1 jumper header between the MMDS05 and COMMON pins Then use the system s OSC command to select a frequency For a user supplied clock source coming through the target cable connected to J2 reposi...

Page 23: ...configuration The fabricated jumper in the EVS position enables the emulation software to control the direction of resets This is the only correct W2 configuration for an M68EM05P18 that is part of an MMDS or MMEVS NOTE The TARGET configuration is not correct for an M68EM05P18 that is part of an MMDS or MMEVS Such a configuration would interfere with correct operation of the RESETIN and RESETOUT c...

Page 24: ... the left position OFF disables the option a switch in the right position ON enables the option If a mask option is enabled switched ON and the corresponding bit of the port A data direction register is configured as an input a low on the port A pin generates an interrupt The diagram here shows a possible setting Interrupt masks are disabled for port A lines 0 through 3 and are enabled for port A ...

Page 25: ...EM05P18 in an MMDS05 station module remove the panel from the station module top Fit together EM connectors P1 and P2 on the bottom of the board and platform board DIN connectors Snap the corners of the EM onto the plastic standoffs Connect the target cable if appropriate If installing in an MMDS05 replace the panel At this point you are ready to make remaining cable connections as necessary and r...

Page 26: ...ame and xx is the version of the file MC68HC 8 05P18 Emulation NOTE Be aware that if the computer operating properly COP mask option has been selected as enabled your code must clear the COP watchdog timer counter to avoid a COP reset The counter is cleared by writing a logical 0 to bit 0 at location 3FF0 This should be the first check when code is not operating as expected The MC68HC 8 05P18 MCU ...

Page 27: ... for changing MOR1 options during an emulation session requires manipulation of the reserved register at location 0011 and the MOR1 location First set bit 6 of register 0011 write a 40 to location 0011 If you use the memory modify MM command a Write did not verify message should be ignored The mask options can then be set by writing the desired mask option register byte value to the MOR1 location ...

Page 28: ...and determine if the source of an interrupt was the external IRQ pin or one of the enabled port A interrupts In emulation The port A I O function is rebuilt off chip and the enabled interrupt pullup options will generate interrupts through the external IRQ pin An interrupt service routine using BIL and BIH instructions could not determine if an interrupt was generated via an external IRQ pin or on...

Page 29: ...built external to the MCU while the VREFH input for the A D continues to be at the MCU pin To prevent the port C bit 7 source from affecting the VREFH function port C bit 7 should be made an input by clearing the DDRC7 bit before enabling the A D Programming the 128 Byte EEPROM Array In single chip mode operation The 128 byte EEPROM array can be programmed during normal operation of the part User ...

Page 30: ...MMDS MMEVS Configuration and Operation M68EM05P18UM D 30 MMDS MMEVS Configuration and Operation MOTOROLA ...

Page 31: ...etting M68EM05P18 Jumper Headers and Switches 33 Clock Source Select Header W1 34 Reset Select Header W2 35 Interrupt Mask Control Switch SW1 36 Remaining System Installation 37 MC68HC 8 05P18 Emulation 38 Port A Pullups Interrupts 38 Mask Option Control 39 Port C Bit 7 Sharing with the A D Subsystem 40 HC05EVS Limitations 41 ...

Page 32: ... Setting M68EM05P18 Jumper Headers and Switches on page 33 explains how to set the M68EM05P18 jumper headers Remaining System Installation on page 37 covers the final steps to system installation MC68HC 8 05P18 Emulation on page 38 explains considerations pertaining to the MCU you emulate HC05EVS Limitations on page 41 explains limitations on using the M68EM05P18 in an HC05EVS NOTE Note that you c...

Page 33: ...k Source Select W1 Select the 4 MHz canned oscillator located on the EM board at XY1 X Not applicable Selects a user supplied clock source The clock is input to connector J2 through a target cable assembly Reset Select W2 HC05EVS will drive resets out X The target system will reset the HC05EVS when the RESET line is asserted low Also requires placing a jumper in platform board jumper header J3 Por...

Page 34: ...e default configuration between CAN and COMMON selects the 4 MHz canned oscillator clock source at board location XY1 Another possible clock source is a user supplied clock source coming through the target cable connected to J2 To use this source reposition the W1 jumper header between the T_OSC1 and COMMON pins NOTE The user supplied source through the target cable should be a CMOS level square w...

Page 35: ...y configuration The fabricated jumper in the EVS position enables the HC05EVS to control resets when you press the user or master reset switch Alternatively you can enable the target system to reset the H05EVS To do so Reposition the M68EM05P18 W2 jumper to the TARGET position and Insert a fabricated jumper into the HC05EVS platform board header J3 Provide RESET signal to connector J2 pin 2 T_RST ...

Page 36: ... left position OFF disables the option a switch in the right position ON enables the option If a mask option is enabled switched ON and the corresponding bit of the port A data direction register is configured as an input a low on the port A pin generates an interrupt This diagram shows a possible setting Interrupt masks are disabled for port A lines 0 through 3 and are enabled for port A lines 4 ...

Page 37: ...tform board Find platform board jumper header J1 near the power connector Make sure that three fabricated jumpers are installed per the diagram here To install the M68EM05P18 on the platform board fit together EM connectors P1 and P2 on the bottom of the board and platform board connectors P3 and P4 Snap the corners of the EM onto the plastic standoffs At this point you are ready to make remaining...

Page 38: ...ing emulation Port A Pullups Interrupts In single chip mode operation The simple port A I O feature and the associated interrupt pullup options are implemented through the port A pins of the MC68HC 8 05P18 MCU With this implementation an interrupt service routine could poll the external IRQ pin using BIL and BIH statements and determine if the source of an interrupt was the external IRQ pin or one...

Page 39: ...ure for changing MOR1 options during an emulation session requires manipulation of the reserved register at location 0011 and the MOR1 location First set bit 6 of register 0011 write a 40 to location 0011 If you use the memory modify MM command a Write did not verify message should be ignored The mask options can then be set by writing the desired mask option register byte value to the MOR1 locati...

Page 40: ...ata direction DDRC7 bits are still accessible from the CPU though they have no effect on the external PC7 VREFH pin If the A D subsystem is disabled port C bit 7 functionality will be restored to the external pin and the last conditions stored in PC7 and DDRC7 bits will determine data and direction for the simple I O In emulation Port C is rebuilt external to the MCU while the VREFH input for the ...

Page 41: ...xecuted You can enter a GO command while the PC points to this type of instruction as long as the instruction is not a breakpoint address 3 IRQ SWI Whenever possible avoid mixing interrupt requests IRQs and user software interrupts SWIs to prevent a possible IRQ SWI timing problem A concurrent hardware interrupt and SWI could cause an HC05EVS failure that could stop program execution To recover fr...

Page 42: ...HC05EVS Configuration and Operation M68EM05P18UM D 42 HC05EVS Configuration and Operation MOTOROLA ...

Page 43: ...s 43 Schematics Contents M68EM05P18 Schematics 43 Sheet 1 of 4 45 Sheet 2 of 4 47 Sheet 3 of 4 49 Sheet 4 of 4 51 M68EM05P18 Schematics Refer to the following pages for the four sheets of schematics for the M68EM05P18 emulation module ...

Page 44: ...Schematics M68EM05P18 Schematics M68EM05P18UM D 44 Schematics MOTOROLA ...

Page 45: ... s ETC GROUND IS APPLIED TO PIN 4 OF ALL 8 PIN IC s PIN 7 OF ALL 14 PIN IC s PIN 8 OF ALL 16 PIN IC s PIN 10 OF ALL 20 PIN IC s ETC DESIGNATOR OF GATES ARE SHOWN AS FOLLOWS DEVICE TYPE PIN NUMBERS AND REFERENCE 3 GROUND PIN LOCATIONS 2 VCC PIN LOCATIONS 1 7407 2 1 U1A 7407 1 AND 2 U1A DEVICE TYPE PIN NUMBERS REFERENCE DESIGNATORS 4 RESISTANCE VALUES ARE IN OHMS 5 RESISTORS ARE 1 4 WATT 5 6 CAPACIT...

Page 46: ...Schematics M68EM05P18 Schematics M68EM05P18UM D 46 Schematics MOTOROLA ...

Page 47: ...PD7 TCAP 25 XU5 MC68HC05P18 SH 4 IRQ MCU3 MCU4 MCU5 RESET PD5 SH 3 4 SH 3 GND SPARE 12 11 1 3 U9D 74HC126AN R6 10K AD0 AD1 OSC1 TCMP A12 RW A11 LIR A10 A8 A9 E A8 LLIR TCMP RW PH2 A13 GND 1 D1 2 D2 3 D3 4 D4 5 D5 6 D6 7 D7 8 D8 9 CLK 11 OC 1 Q1 19 Q2 18 Q3 17 Q4 16 Q5 15 Q6 14 Q7 13 Q8 12 U3 74HC574AN LA12 LA11 LA10 LA9 LA8 LA7 LA6 LA5 LA4 LA3 LA2 LA1 LA0 LR W VCC GND RESET LR W LA13 D1 2 D2 3 D3 ...

Page 48: ...Schematics M68EM05P18 Schematics M68EM05P18UM D 48 Schematics MOTOROLA ...

Page 49: ...C0 PC1 PC2 PC7 GND PC7 TPC3 TPC4 TPC5 TPC6 MCU5 MCU4 MCU3 MCU0 GND TPC 0 7 DECODE TABLE PORTS 0000 0002 0004 0006 DACIA 3FE0 3FE3 SWITCH 0050 STACK_CAP 3FE4 DACIA_CS URAM 0020 004F or 1FC0 3FFF MEPROM 0800 3FFF MRAM 0050 00FF INTERNAL 0001 0003 0005 0007 DACIA_CS STACK_CAP 0008 001F 0140 01BF 3F00 3F01 SH 4 WR_DDRA WE 0004 CONNECTOR 1 DAUGHTER BOARD LA14 LA1 LA2 LA3 LA4 LA5 LA6 LA7 LA8 LA9 LA10 LA...

Page 50: ...Schematics M68EM05P18 Schematics M68EM05P18UM D 50 Schematics MOTOROLA ...

Page 51: ...WE AD0 AD1 AD2 AD3 AD4 AD5 AD6 VCC VCC VDD 22 IO0 2 IO1 3 IO2 4 IO3 5 IO4 6 IO5 7 IO6 8 IO7 9 I0 10 I1 11 CLK0 I2 13 IO8 14 IO9 15 IO10 16 IO11 17 IO12 18 IO13 19 IO14 20 IO15 21 VSS 1 VSS 12 VDD 44 IO31 43 IO30 42 IO29 41 IO28 40 IO27 39 IO26 38 IO25 37 IO24 36 CLK1 I5 35 I4 33 I3 32 IO23 31 IO22 30 IO21 29 IO20 28 IO19 27 IO18 26 IO17 25 IO16 24 VSS 23 VSS 34 XU7 MACH110 20JC LRW GND SH 3 Q3 2N4...

Page 52: ...Schematics M68EM05P18 Schematics M68EM05P18UM D 52 Schematics MOTOROLA ...

Page 53: ...M68EM05P18UM D MOTOROLA Schematics 53 Note Page ...

Page 54: ...M68EM05P18UM D 54 Schematics MOTOROLA Note Page ...

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Page 56: ...pplication in which the failure of the Motorola product could create a situation where personal injury or death may occur Should Buyer purchase or use Motorola products for any such unintended or unauthorized application Buyer shall indemnify and hold Motorola and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable a...

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