Motorola M68EM05P18, User Manual

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HC05EVS Configuration and Operation
MC68HC(8)05P18 Emulation
M68EM05P18UM/D
38 HC05EVS Configuration and Operation MOTOROLA
MC68HC(8)05P18 Emulation
NOTE:
Be aware that if the computer operating properly (COP) mask
option has been selected as enabled, your code must clear
the COP watchdog timer counter to avoid a COP reset. The
counter is cleared by writing a logical 0 to bit 0 at location
$3FF0. This should be the first check when code is not
operating as expected.
The MC68HC(8)05P18 MCU is emulated on the M68EM05P18
emulation module. The resident MCU (socket XU5) should be an
EEPROM device (an MC68HC805P18).
The following paragraphs detail known differences between the
performance of an MC68HC805P18 MCU run in single-chip operation
versus the way certain features will perform during emulation.
Port A Pullups/
Interrupts In single-chip mode operation:
The simple port A I/O feature and the associated interrupt/pullup
options are implemented through the port A pins of the
MC68HC(8)05P18 MCU. With this implementation, an interrupt
service routine could poll the external IRQ pin using BIL and BIH
statements and determine if the source of an interrupt was the
external IRQ pin or one of the enabled port A interrupts.
In emulation:
The port A I/O function is rebuilt off-chip and the enabled
interrupt/pullup options will generate interrupts through the external
IRQ pin. An interrupt service routine using BIL and BIH instructions
could not determine if an interrupt was generated via an external IRQ
pin or one of the enabled port A interrupts. The proper way to
differentiate between a port interrupt and an external interrupt is to
have the interrupt service routine poll possible port A interrupts. If
none are low, then the interrupt was driven by an external IRQ.