Motorola
iii
Table of Contents
1.1
INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.1.1
Manual Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.1.2
Manual Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.2
DSP56012 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.3
DSP56012 ARCHITECTURAL OVERVIEW . . . . . . . . . . . . . 1-8
1.3.1
Peripheral Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.3.2
DSP Core Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.3.2.1
Data Arithmetic and Logic Unit (Data ALU) . . . . . . . . 1-11
1.3.2.2
Address Generation Unit (AGU). . . . . . . . . . . . . . . . . 1-11
1.3.2.3
Program Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.3.2.4
Data Buses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.3.2.5
Address Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.3.2.6
Phase Lock Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.3.2.7
On-Chip Emulation (OnCE) Port . . . . . . . . . . . . . . . . 1-13
1.3.3
Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13
1.3.3.1
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13
1.3.3.2
X Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15
1.3.3.3
Y Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15
1.3.3.4
On-Chip Memory Configuration Bits . . . . . . . . . . . . . 1-15
1.3.3.5
Memory Configuration Bits . . . . . . . . . . . . . . . . . . . . . 1-16
1.3.3.6
External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16
1.3.3.7
Bootstrap ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16
1.3.3.8
Reserved Memory Spaces . . . . . . . . . . . . . . . . . . . . . 1-16
1.3.4
Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16
1.3.4.1
Parallel Host Interface (HI) . . . . . . . . . . . . . . . . . . . . . 1-18
1.3.4.2
Serial Host Interface (SHI) . . . . . . . . . . . . . . . . . . . . . 1-18
1.3.4.3
Serial Audio Interface (SAI) . . . . . . . . . . . . . . . . . . . . 1-19
1.3.4.4
General Purpose I/O . . . . . . . . . . . . . . . . . . . . . . . . . 1-19
1.3.4.5
Digital Audio Transmitter (DAX) . . . . . . . . . . . . . . . . . 1-19
2.1
SIGNAL GROUPINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.2
POWER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.3
GROUND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.4
PHASE LOCK LOOP (PLL). . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.5
INTERRUPT AND MODE CONTROL . . . . . . . . . . . . . . . . . . 2-8
Summary of Contents for DSP56012
Page 12: ...xii Motorola ...
Page 20: ...xx Motorola ...
Page 21: ...MOTOROLA DSP56012 User s Manual 1 1 SECTION 1 OVERVIEW ...
Page 40: ...1 20 DSP56012 User s Manual MOTOROLA Overview DSP56012 Architectural Overview ...
Page 41: ...MOTOROLA DSP56012 User s Manual 2 1 SECTION 2 SIGNAL DESCRIPTIONS ...
Page 61: ...SECTION 3 MEMORY OPERATING MODES AND INTERRUPTS ...
Page 81: ...MOTOROLA DSP56012 User s Manual 4 1 SECTION 4 PARALLEL HOST INTERFACE ...
Page 148: ...4 68 DSP56012 User s Manual MOTOROLA Parallel Host Interface Host Interface HI ...
Page 149: ...MOTOROLA DSP56012 User s Manual 5 1 SECTION 5 SERIAL HOST INTERFACE ...
Page 179: ...MOTOROLA DSP56012 User s Manual 6 1 SECTION 6 SERIAL AUDIO INTERFACE ...
Page 205: ...MOTOROLA DSP56012 User s Manual 7 1 SECTION 7 GPIO ...
Page 210: ...7 6 DSP56012 User s Manual MOTOROLA GPIO GPIO Register GPIOR ...
Page 211: ...MOTOROLA DSP56012 User s Manual 8 1 SECTION 8 DIGITAL AUDIO TRANSMITTER ...
Page 226: ...8 16 DSP56012 User s Manual MOTOROLA Digital Audio Transmitter DAX Programming Considerations ...
Page 233: ...MOTOROLA DSP56012 User s Manual B 1 APPENDIX B PROGRAMMING REFERENCE ...