Moeller XIOC, Hardware And Engineering

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04/03 AWB2725-1452GB
State display in the controller
configuration
35
State display in the controller configuration
The counter module indicates its status in 5 words, within the
controller configuration:
1st word: status
2nd word: input data, Low word, channel 1
3rd word: input data, High word, channel 1
4th word: input data, Low word, channel 2
5th word: input data, High word, channel 2
The status word is composed of the following bits:
Significance of the bit:
Apart from EC, the bit states are retained if the CPU changes state,
from RUN
l STOP or STOP l RUN.
FLAG summary
All the flags and their meanings are listed below
All flags (apart from EC) retain their states if the state of the CPU
changes from RUN
l
STOP or STOP
l
RUN.
Channel Channel
2
Channel 1 Channel 2 Channel 1
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Meaning 0 0 0 0 OF2 UF2 OF1 UF1 EQ2 OE2 ME2 CE2 EQ1 OE1 ME1 CE1
CE Counter state (default value = 0)
0: no enable
1: enabled
ME Reference input state (default value = 0)
0: no enable
1: enabled
OE Output Y state (default value = 0)
0: no enable
1: enabled
EQ
State
of Equal flag
0: no action
1: if actual value = comparison value
It remains set until a “0” signal is applied to the
“CompareOutput
n
Enable” input of the
“CounterControl” block.
UF State of Underflow flag
It is set if the actual value changes from 0 to 4294967295
(FFFFFFFF
hex
). It will remain set until the CLEARUNDERFLOW
command is applied to the “Command” input of the
“CounterFlags” function block. The output words “Outputs”,
“StatusChannel
n
” and “OutputsChannel
n
” will be set to
“0”.
OF State of Overflow flag
It is set if the actual value changes from 4294967295
(FFFFFFFF
hex
) to 0. It will remain set until the
CLEARUNDERFLOW command is applied to the “Command”
input of the “CounterFlags” function block. The output words
“Outputs”, “StatusChannel
n ” and “OutputsChannel n ” will
be set to “0”.
Flag Designation Meaning
CE CounterEnable Pulse inputs are enabled (1) or inhibited
(0)
1)
ME ReferenceMarker
Enable Reference input is enabled (1) or
inhibited (0)
1)
OE OutputEnable Latch output (=) is enabled (1) or
inhibited (0)
1)
EQ Equal Flag The Equal flag is set if actual value =
comparison value.
1)
EC ClearEqual Clear Equal flag: after being set (“1”
signal) it sets the Latch output (=) to a
“0” signal. The EC flag must be reset
(“0” signal).
UF Underflow It is set if the actual value changes from
0 to 4294967295 (FFFFFFFF
hex
). It will
remain set until the CLEAROVERFLOW
command is applied to the
“CounterFlags” function block.
OF Overflow It is set if the actual value changes from
“4294967295” (FFFFFFFF
hex
) to “0”. It
will remain set until the
CLEAROVERFLOW command is applied
to the “CounterFlags” function block.
1) Default value = 0
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