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M722 N/B MAINTENANCE
M722 N/B MAINTENANCE
Power management control pins.
Spread spectrum function can be disabled.
Low voltage, 8 skew controlled CMOS output clock buffers (SDRAM 0:7)
Supports two SDRAM DIMMS.
Ideal for high performance systems designed around Intel’s latest mobile chip set.
I2C serial configuration interface.
Skew between any two SDRAM output is less than 250ps
1 to 5ns propagation delay.
Dc to 133mhz operation.
Singles 3.3V supply voltage.
Low power CMOS design packaged in a 48-pin, SSOP(Shrink small package).
Figure 2 : System clock structure and ICS 9148-101 block diagram
