Board Components and Operations
UG0747 User Guide Revision 1.0
13
Figure 5 •
DDR4 Memory Interface
For more information, see the Board Level Schematics document (provided separately).
4.2
SPI Serial Flash
The SPI flash specifications for the PolarFire device are:
•
Density: 1 Gb
•
Voltage: 2.7 V to 3.6 V (MT25QL01GBBB8ESF-0SIT)
•
Voltage: 1.7 V to 2 V (MT25QU01GBBB8ESF-0SIT)
•
Frequency: 90 MHz
•
Quantity = 2
•
SPI mode support: Modes 0 and 3
•
HSIO bank 6 and Dedicated Bank 3
Figure 6 •
SPI Flash Interface
For more information, see the Board Level Schematics document (provided separately).
4.3
Transceivers
The PolarFire MPF300TS-1FCG1152I device has 16 transceiver lanes. These transceiver lanes can be
accessed through the PCIe edge, SFP+, SMA, and FMC connectors on the board.
4.3.1
XCVR0 Interface
The XCVR0 interface has four lanes connected as follows:
•
Lanes 0, 1, 2, and 3 are directly routed to the PCIe connector
•
TX pad > trace > AC coupling > trace > via (to bottom layer) > trace > PCIe connector pad
•
RX pad > trace > via (to Top layer) > trace > PolarFire device pad
The XCVR0 reference clock is routed directly from the PCIe connector to the PolarFire device.
The XCVR0 TXD pairs are capacitively coupled to the PolarFire device. Serial AC-coupling capacitors
are used to provide common-mode voltage independence.
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