Figure 5-4. MPU Power
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
POWER TEST POINTS
A copper plan
for GNDUTMII cover
all USB compoments
(3V3)
(1V2)
(1V8)
(3V3)
)
3
V
3
(
)
3
V
3
(
)
3
V
3
(
)
5
V
2
(
)
2
V
1
(
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V2)
(1V2)
(1V2)
(1V2)
(2V5)
(3V3)
(1V2)
)
3
V
3
(
)
2
V
1
(
(3V3)
All 100nF 0402 capacitors close to the the Pin of VDD***.
(3V3)
(3V3 or 1V8)
(3V3 or 1V8)
RevB
VDDBU
VDDCORE
VDDPLLA
VDDIOP0
VDDIOP1
VDDIOP2
VDDHSIC
VDDUTMIC
VDDUTMII
VDDSDHC
VDDPLLA
VDDOSC
VDDISC
VDDFUSE
VDDAUDIOPLL
VDDBU
VDDIODDR
VDDANA
VDDANA
VDDIOP0
VDDIOP1
VDDIOP2
VDDHSIC
VDDFUSE
VDDUTMII
VDDSDHC
VDDOSC
VDDISC
VDDUTMIC
VDDCORE
VDDIODDR
VDDAUDIOPLL
GNDUTMII
GND_POWER
GND_POWER
VDDBU
GND_POWER
GND_POWER
GND_POWER
VDDCORE
GND_POWER
VDDIODDR
VDDANA
GND_POWER
VDDIOP0
GND_POWER
VDDIOP1
GND_POWER
VDDIOP2
GND_POWER
VDDHSIC
GND_POWER
VDDFUSE
GND_POWER
VDDUTMII
GND_POWER
VDDSDHC
GND_POWER
VDDPLLA
GND_POWER
VDDOSC
VDDISC
GND_POWER
GND_POWER
VDDUTMIC
GND_POWER
GNDUTMII
VDD_MAIN_5V
VDD_1V25
VDD_1V8
VDDFUSE
VDD_3V3
VDDSDHC1V8
VDDCORE
VDDIODDR
VDDBU
VDDHSIC
VDDFUSE
VDDUTMIC
VDDUTMII
VDDPLLA
VDDOSC
VDDSDHC
GND_POWER
VDDAUDIOPLL
REV
DATE
MODIF.
DES.
DATE
VER.
SCALE
1/1
REV.
SHEET
INIT EDIT
A
A
RevA
4
13
B
XX-XXX-XX
ZhouB
XXX
04) MPU_POWER
06-JAN-17
SAMA5D2-PTC-EK
XXX XX-XXX-XX
ZhouB 07-MAR-17
03-OCT-17
THR
X
X
-
X
X
X
-
X
X
X
X
X
B
REV
DATE
MODIF.
DES.
DATE
VER.
SCALE
1/1
REV.
SHEET
INIT EDIT
A
A
RevA
4
13
B
XX-XXX-XX
ZhouB
XXX
04) MPU_POWER
06-JAN-17
SAMA5D2-PTC-EK
XXX XX-XXX-XX
ZhouB 07-MAR-17
03-OCT-17
THR
X
X
-
X
X
X
-
X
X
X
X
X
B
REV
DATE
MODIF.
DES.
DATE
VER.
SCALE
1/1
REV.
SHEET
INIT EDIT
A
A
RevA
4
13
B
XX-XXX-XX
ZhouB
XXX
04) MPU_POWER
06-JAN-17
SAMA5D2-PTC-EK
XXX XX-XXX-XX
ZhouB 07-MAR-17
03-OCT-17
THR
X
X
-
X
X
X
-
X
X
X
X
X
B
C35
100nF
C0402
TP9 SMD
C51
1nF
C0402
C54
4.7uF
C0805
C31
100nF
C0402
C25
4.7uF
C0805
C61
1nF
C0402
C56
100nF
C0402
C37
100nF
C0402
C59
1nF
C0402
TP6 SMD
TP18 SMD
C20
10uF
C0603
TP1 SMD
C19
10uF
C0603
C21
100nF
C0402
C42
100nF
C0402
C40
100nF
C0402
C52
1nF
C0402
C50
100nF
C0402
TP7 SMD
C48
100nF
C0402
TP2 SMD
C26
100nF
C0402
C53
100nF
C0402
C28
10uF
C0603
C30
100nF
C0402
C34
100nF
C0402
C60
1nF
C0402
C46
100nF
C0402
C41
4.7uF
C0805
C49
100nF
C0402
TP17 SMD
C27
10uF
C0603
C44
100nF
C0402
R20
1R-1%
R0603
C29
100nF
C0402
C36
100nF
C0402
R21
1R-1%
R0603
C24
4.7uF
C0805
C47
100nF
C0402
C32
100nF
C0402
ATSAMA5D27C-CN
U6G
bga289p8
GNDADC
K5
GNDANA
L3
GNDBU
N6
GNDCORE_1
E7
GNDCORE_2
E9
GNDCORE_3
H4
GNDCORE_4
K12
GNDCORE_5
M5
GNDCORE_6
M9
GNDDDR_1
D14
GNDDDR_2
E11
GNDDDR_3
E12
GNDDDR_4
E14
GNDDDR_5
H14
GNDDDR_6
J14
GNDDDR_7
L14
GNDDPLL
T5
GNDAUDIOPLL
T4
GNDIOP0_1
F6
GNDIOP0_2
G7
GNDIOP1_1
M13
GNDIOP1_2
P14
GNDIOP2
F9
GNDISC
G4
GNDOSC
T6
GNDPLLA
U5
GNDSDMMC
R11
GNDUTMII
P9
GNDUTMIC
R7
VDDADC
L5
VDDANA
K3
VDDBU
N7
VDDCORE_1
D7
VDDCORE_2
D9
VDDCORE_3
H3
VDDCORE_4
K13
VDDCORE_5
N5
VDDCORE_6
N9
VDDDDR_1
D11
VDDDDR_2
D12
VDDDDR_3
D15
VDDDDR_4
E15
VDDDDR_5
H15
VDDDDR_6
J15
VDDDDR_7
L15
VDDAUDIOPLL
T3
VDDFUSE
M12
VDDHSIC
R9
VDDIOP0_1
E6
VDDIOP0_2
F7
VDDIOP1_1
N13
VDDIOP1_2
R14
VDDIOP2
F10
VDDISC
F4
VDDOSC
T7
VDDPLLA
U4
VDDSDMMC
P11
VDDUTMII
P8
VDDUTMIC
P7
TP3 SMD
C55
100nF
C0402
C23
100nF
C0402
C43
100nF
C0402
TP13 SMD
TP12 SMD
TP8 SMD
C38
100nF
C0402
TP5 SMD
R22
0R
R0603
TP11 SMD
C58
1nF
C0402
C57
100nF
C0402
C33
100nF
C0402
C39
100nF
C0402
TP14 SMD
TP15 SMD
TP16 SMD
TP19 SMD
TP4 SMD
TP10 SMD
C45
100nF
C0402
C22
100nF
C0402
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
©
2017 Microchip Technology Inc.
DS50002709A-page 52
