MESA Electronic 4I24M Series, Manual

Page: 7 / 19

CONFIGURATION
BASE ADDRESS SELECTION
The I/O addresses of the three 82C55's on the 4I24M are selected by placing shorting jumpers on
jumper blocks W6 through W11. Jumper blocks W6 through W11 have three pins and two valid
shorting jumper locations, up, and down. The position of jumpers on W6 through W11 is a binary
representation of the 4I24M base address. When a jumper is in the up position, it matches a high
address line.
The following table shows some example base address settings
BASE ADDRESS W6 W7 W8 W9 W10 W11
(A9) (A8) (A7) (A6) (A5) (A4)
0200H (Default) up down down down down down
0290H up down up down down up
0360H up up down up up down
ALIASED ADDRESS SELECTION
If multiple 4I24M's are used in a single system, I/O address space can be conserved by using
aliased address's. Aliased addresses are an artifact caused by the partial (only 10 bit) address decoding
used by most PC-bus cards. 4I24M cards actually decode A15 and A14 in addition to A0 through A9.
This makes it possible to have up to four 4I24M's located at what appears to other cards in the system
to be a single 16 byte block of I/O addresses. This is done by selecting the same base addresses on all
cards, but selecting differing high order (aliased) addresses.
The aliased address used by a 4I24M is selected via shorting jumpers W12 and W13.
Note that aliased addressing only makes sense when using multiple 4I24M's in a single system,
and when all base address's used are the same.
The following table shows all four of the possible aliased address settings:
ALIASED ADDRESS W12 W13
(A15) (A14)
BASE + 0000H (Default) down down
BASE + 4000H down up
BASE + 8000H up down
BASE + C000H up up
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4I24M USER'S MANUAL