
CX900e Hardware Reference Manual
7-2
3006M100-002
7.1
Universal I/O Card Components
This section describes the major components of the Universal I/O card. Th
physical layout of the components is shown in Figure 7-1. Figure 7-2 provides a
functional block diagram of the card.
7.1.1
CX900e I/O Bus
The CX900e I/O bus carries the address bus, data bus, and clocking/control
signals from the motherboard CPU to the Universal I/O card. Transceivers
interface the local buses to the CX900e I/O bus. Connection of the I/O bus to th
motherboard is via a 120-pin card edge connector.
7.1.2
Communications Controller
The MC68EN360, located at U3, is a Quad Universal Integrated Communications
Controller (QUICC) containing four Serial Communication Controllers (SCCs)
which serve ports 2 to 5. The SCC for Port 1 is provided by the motherboard.
An additional QUICC is required when Universal I/O cards are installed in slots 5
or 6. This QUICC is located on the Data Expansion Module (DEM) which is
plug-in card inserted into a 144-pin SODIMM connector on the motherboard on
U3.
Figure 7-1 Universal I/O Card
(to m oth erb oa rd e x p an s io n s lots )
e dg e c on n e c to r
c o n figu ratio n c o n n ec to r
p h ys ic a l in te rfa c e
D T E /D C E p o rt
c o nfig u ra tion c o nn e c to r
L K Ju m pe rs (LK 1 to L K 5 )
c o n fig uratio n co n n e cto r
c lo c k s o u rc e
Summary of Contents for CX900e
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