MeiG Smart product technical information
SLM758
Hardware Design Guide
Page 45
Note: 1. The backlight circuit should select the chip according to the backlight circuit of the
LCD. Users should carefully read the LCD document and select the correct driver chip. The
reference circuit provided in this document is a series-type PWM dimming backlight driver
circuit; if it is a series-type one-line dimming backlight driver circuit, it needs to be controlled
by GPIO.
4.6.2.MIPI Camera Interface
The SLM758 module supports the MIPI interface Camera and provides a dedicated camera
power supply. The main camera is a CSI0 interface that supports four sets of data lines and can
support up to 24M pixels. The front camera is a CSI2 interface that supports four sets of data
lines and can support 8M pixels. There is also a set of CSI1 interface, which can do dual 13M
dual camera design with the main camera, or as a dual camera design for the depth of field
camera; it can also be used as the MIPI interface scan head design. The module provides the
power required by the Camera, including AVDD-2.8V, IOVDD-1.8V\AFVDD-2.8V (powered
by the focus motor) and D-VDD1.2V (CAM core voltage).
Table
4.6
：
MIPI
Camera
Interface
Definition
Main camera interface
Name
Pin
Input/output
Description
MIPI_CSI0_CLK_N
50
I/O
Main camera MIPI clock signal
MIPI_CSI0_CLK_P
49
I/O
MIPI_CSI0_LANE0_N
56
I/O
Main camera MIPI data signal
MIPI_CSI0_LANE0_P
55
I/O
MIPI_CSI0_LANE1_N
194
I/O
MIPI_CSI0_LANE1_P
193
I/O
MIPI_CSI0_LANE2_N
52
I/O
MIPI_CSI0_LANE2_P
51
I/O
MIPI_CSI0_LANE3_N
54
I/O
MIPI_CSI0_LANE3_P
53
I/O
GPIO26_MCAM_MCLK
84
O
Main camera clock signal
GPIO40_MCAM_RST_N
85
O
Main camera reset signal
GPIO39_MCAM_PWD_N
86
O
Main camera sleep signal
CAM_I2C_SDA0
105
I/O
I2C data
CAM_I2C_SCL0
104
I/O
I2C clock
VREG_L6_1P8
139
O
1.8V IOVDD
VREG_L17_2P85
137
O
2.8V AFVDD
（
Focus motor power
supply
）
VREG_L22_2P8
136
O
2.8V AVDD
VREG_L2_1P1
199
O
1.2V DVDD
