MeiG_SLM550_Hardware Design Manual
MeiG Smart Technology Co., Ltd
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When the serial level used by the user does not match the module, in addition to adding the level
shifting IC, the following figure can also be used to achieve level matching. Only the matching circuits
on TX and RX are listed here. Other low speed signals can refer to this two circuits.
Figure 21 TX Connection Diagram
Figure 22 RX Connection Diagram
Note
:
When using Levels Isolation in Figures 14 and 15, Attention should be paid to LDO6_1P8 output timing,
the serial port can communicate normally after the normal output.
Table 7 Serial Port Hardware Parameters
Description
Minimum
Maximum
Unit
Input low level
-
0.63
V
Input high level
1.17
-
V
Module
module
LDO15_1P8
LDO15_1P8
