MAXDATA PLATINUM 110, System Manual

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10 Server Description 11 MAXDATA PLATINUM 220 Server
Intel
®
875P Chipset
The Intel ® 875P chipset consists of the following devices:
• Intel ® 82875P Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus.
• Intel ® 82801ER I/O Controller Hub (ICH5-R) with AHA bus.
• Intel
®
82802AC Firmware Hub (FWH).
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH5-R is a centralized controller for the board’s I/O
paths. The FWH provides the nonvolatile storage of the BIOS.
Intel
®
82875P Memory Controller Hub (MCH)
The MCH supports the data integrity features supported by the Pentium
®
4 processor bus, including
address, request, and response parity. The 875P chipset always generates ECC data while it is driving
the processor data bus, although the data bus ECC can be disabled or enabled by BIOS. It is enabled
by default. The MCH controls the Intel
®
82547EI from the CSA interface.
The MCH provides the following:
• An integrated DDR memory controller with auto detection.
• Support for ACPI Rev 2.0 compliant power management.
• AGP 2.0 slot, also known as AGP 8x.
Intel
®
82801ER I/O Controller Hub (ICH5-R)
The Intel
®
82801ER ICH5-R has these features:
• Upstream Hub Interface to the MCH.
• Integrated IDE controller (supports two Ultra ATA-100/66 mode, Ultra DMA 33 mode,
and PIO mode).
• Integrated SATA controller supports two SATA devices with transfer speeds up to 150 MB/sec
and independent DMA operation on the two ports.
• One USB 2.0-compliant host controller that supports all six USB ports.
• SMBus 2.0 interface.
• FWH interface.
• Support for the Low Pin Count (LPC) interface.
• Integrated LAN controller (Intel
®
8562ET).
• 33 MHz Peripheral Component Interface (PCI) Local Bus slots supporting PCI specification,
Rev 2.3.
• Power management logic (ACPI Rev 2.0-compliant).
• Support for two Ultra DMA 33/ATA 100/66 connectors.