26
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
ESC : Quit
↑ ↓ → ←
: Select Item
F1 : Help PU/PD/+/– : Modify
F5 : Old Values (Shift)F2 : Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
Bank 0/1 DRAM Timing : FP/EDO 70ns
Bank 2/3 DRAM Timing : FP/EDO 70ns
Bank 4/5 DRAM Timing : FP/EDO 70ns
SDRAM Cycle Length : 3
DRAM Read Pipeline : Enabled
Cache Rd+CPU Wt Pipeline : Enabled
Cache Timing : Fast
Video BIOS Cacheable : Enabled
System BIOS Cacheable : Enabled
Memory Hole At 15Mb. Addr.: Disabled
AGP Aperture Size : 64MB
AGP-2x Mode : Disabled
OnChip USB : Disabled
USB Keyboard Support : Disabled
A short description of screen options follows:
Bank 0~5 DRAM
Timing Control
Use the default setting. Do not
change this setting unless you know
the DRAM access time spec.
SDRAM Cycle
Length
Use the default setting.
DRAM Read
Pipeline
Use the default setting.
Cache Rd+CPU Wt
Pipeline
Use the default setting.
Cache Timing
Use the default setting.
Video BIOS
Cacheable
Choose Enabled (default) or
Disabled. When Enabled, the access
to the VGA BIOS ROM addressed at
C0000H-C7FFFH is cached.
System BIOS
Cacheable
Choose Enabled (default) or
Disabled. When Enabled, the access
to the system BIOS ROM addressed
at F0000H-FFFFFH is cached.
