R3-PA8
P. / 3
EM-8457
The bits indicating the channels to reset counter are allocated in the first word from host PC/PLC.
When these bits are changed from 0 to 1, the counter is reset. When it is confirmed that the counter is reset, return to 0.
Notice that if the bit remains at 1, the next reset will not work.
0
15
Count reset CH.1
Unused
Unused
Count reset CH.2
Count reset CH.3
Count reset CH.4
Count reset CH.8
BIT ALLOCATION OF THE FIRST WORD FROM HOST PC/PLC
COMPONENT IDENTIFICATION
RUN LED
1
11
12
13
14
15
16
17
18
19
20
2
3
4
5
6
7
8
9
10
ERR LED
Status Indicator LED
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
■
FRONT VIEW
■
SIDE VIEW
SW3
ON
4
3
2
1
Count
Reset
Count
Reset Input
Set the Count Reset SW to OFF to start counting.
Functions
■
STATUS INDICATOR LED
RUN indicator
: Bi-color (red/green) LED;
Red when the bus A operates normally;
Green when the bus B operates normally;
Amber when both buses operate normally.
ERR indicator
: Bi-color (red/green) LED;
Red with the excitation abnormality;
Green in normal operating conditions.
Input status indicator
: Red LED;
1 to 8
:
Turns on with the inputs supplied.
9 to 15
:
Unused*
16
:
Turns on with the reset input supplied.
*The LEDs are connected with terminals via internal cir-
cuit. Therefore, the LED turns on, if the corresponding ter-
minal is connected to terminal 10 or 20. However, it does
not affect the operation.
