LTC1760
14
1760fc
For more information
www.linear.com/LTC1760
OPERATION
1 Overview
The LTC1760 is composed of an SMBus interface with
dual port capability, a sequencer for managing system
power and the charging and discharging of two batteries,
a battery charger controller, charge MUX controller, Pow-
erPath controller, a 10-bit current DAC (I
DAC
) and 11-bit
voltage DAC (V
DAC
). When coupled with optional system
software for generating composite battery information,
it forms a complete Smart Battery System Manager for
charging and selecting two smart batteries. The battery
charger is controlled by the sequencer which uses a Level
3 SMBus interface to read ChargingVoltage(), Voltage(),
ChargingCurrent(), Current(), Alarm() and BatteryMode().
This information, together with thermistor measurements
allows the sequencer to select the charging battery and
safely servo on voltage and current. Charging can be
accomplished only if the voltage at DCDIV indicates that
sufficient voltage is available from the input power source,
usually an AC adapter. The charge MUX, which selects
the battery to be charged, is capable of charging both
batteries simultaneously. The charge MUX switch drivers
are configured to allow charger current to share between
the two batteries and to prevent current from flowing in
a reverse direction in the switch. The amount of current
that each battery receives will depend upon the relative
capacity of each battery and the battery voltage. This can
result in significantly shorter charging times (up to 50% for
Li-Ion batteries) than sequential charging of each battery.
The sequencer also selects which of the pairs of PFET
switches will provide power to the system load. If the
system voltage drops below the threshold set by the
LOPWR resistor divider, then all of the output-side PFETs
are turned on quickly. The input-side PFETs act as diodes
in this mode and power is taken from the highest voltage
source available at the DCIN, BAT1, or BAT2 inputs. The
input-side PowerPath switch driver that is delivering power
then closes its input switch to reduce the power dissipa-
tion in the PFET bulk diode. In effect, this system provides
diode-like behavior from the FET switches, without the
attendant high power dissipation from diodes. The Host
is informed of this 3-Diode mode status when it polls the
PowerPath status register via the SMBus interface. High
speed PowerPath switching at the LOPWR trip point is
handled autonomously.
Simultaneous discharge of both batteries is supported.
The switch drivers prevent reverse current flow in the
switches and automatically discharge both batteries into
the load, sharing current according to the relative capacity
of the batteries. Simultaneous dual discharge can increase
battery operating time by up to 10% by reducing losses
in the switches and reducing internal battery losses as-
sociated with high discharge rates.
2 The SMBus Interface
2.1 SMBus Interface Overview
The SMBus interface allows the LTC1760 to communi-
cate with two batteries and the SMBus Host. The SMBus
Interface supports true dual port operation by allowing
the SMBus Host to be connected to the SMBus of either
battery. The LTC1760 is able to operate as an SMBus
Master or Slave device. The LTC1760 SMBUS address is
0
×
14 (8-bit format).
References:
Smart Battery System Manager Specification: Revision
1.1, SBS Implementers Forum.
Smart Battery Data Specification: Revision 1.1, SBS Imp-
lementers Forum.
Smart Battery Charger Specification: Revision 1.1, SBS Imp-
lementers Forum
System Management Bus Specification: Revision 1.1, SBS
Implementers Forum
I
2
C-Bus and How to Use it: V1.0, Philips Semiconductor.
(Refer to Block Diagram and Typical Application Figure)
