LTM4612
7
4612fc
For more information
PIN FUNCTIONS
V
IN
(Bank 1):
Power Input Pins. Apply input voltage be-
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between V
IN
pins
and PGND pins.
PGND (Bank 2):
Power Ground Pins for Both Input and
Output Returns.
V
OUT
(Bank 3):
Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing out-
put decoupling capacitance directly between these pins and
GND pins (see the LTM4612 Pin Configuration below).
V
D
(Pins B7, C7):
Top FET Drain Pins. Add more capa-
citors between V
D
and ground to handle the input RMS
current and reduce the input ripple further.
DRV
CC
(Pins C10, E11, E12):
These pins normally connect
to INTV
CC
for powering the internal MOSFET drivers. They
can be biased up to 6V from an external supply with about
50mA capability. This improves efficiency at higher input
voltages by reducing power dissipation in the module.
INTV
CC
(Pin A7):
This pin is for additional decoupling of
the 5V internal regulator.
PLLIN (Pin A8):
External Clock Synchronization Input to the
Phase Detector. This pin is internally terminated to SGND
with a 50k resistor. Apply a clock above 2V and below
INTV
CC
. See the Applications Information section.
FCB (Pin M12):
Forced Continuous Input. Connect this pin
to SGND to force continuous synchronization operation at
low load, to INTV
CC
to enable discontinuous mode opera-
tion at low load or to a resistive divider from a secondary
output when using a secondary winding.
TRACK/SS (Pin A9):
Output Voltage Tracking and Soft-Start
Pin. When the module is configured as a master output,
then a soft-start capacitor is placed on this pin to ground
to control the master ramp rate. A soft-start capacitor can
be used for soft-start turn-on as a standalone regulator.
Slave operation is performed by putting a resistor divider
from the master output to the ground, and connecting the
center point of the divider to this pin. See the Applications
Information section.
MPGM (Pins A12, B11):
Programmable Margining In-
put. A resistor from these pins to ground sets a current
that is equal to 1.18V/R. This current multiplied by 10k
will equal a value in millivolts that is a percentage of the
0.6V reference voltage. May be left open if margining is
not desired. See the Applications Information section. To
parallel LTM4612s, each requires an individual MPGM
resistor. Do not tie MPGM pins together.
f
SET
(Pin B12):
Frequency Set Internally to ~850kHz to
900kHz at 12V Output. An external resistor can be placed
from this pin to ground to increase frequency. See the
Applications Information section for frequency adjustment.
LTM4612 Pin Configuration
(See Package Description for Pin Assignments)
MARG1
DRV
CC
V
FB
PGOOD
SGND
NC
NC
NC
FCB
V
IN
BANK 1
V
D
PGND
BANK 2
V
OUT
BANK 3
f
SET
MARG0
RUN
COMP
MPGM
PLLIN
INT
V
CC
TRACK/SS
LGA PACKAGE
133-LEAD (15mm × 15mm × 2.8mm)
TOP VIEW
SGND
12
2
1
4
3
5 6
9
8
10 11
7
A
B
C
D
E
F
G
H
J
K
L
M
