LTM4612
16
4612fc
where V
FB
is the feedback voltage reference of the regula-
tor, and V
TRACK
is 0.6V. Since R2 is equal to the 100k top
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then R1 is equal to R
FB
with V
FB
=
V
TRACK
. Therefore R2 = 100k, and R1 = 5.23k in Figure 6.
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. R2 can be solved for when SR is
slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
For example, MR = 1.5V/1ms, and SR = 1.2V/1ms. Then
R2 = 125k. Solve for R1 to equal to 5.18k.
Each of the TRACK pins will have the 1.5µA current source
on when a resistive divider is used to implement tracking
on that specific channel. This will impose an offset on the
TRACK pin input. Smaller values resistors with the same
ratios as the resistor values calculated from the above
equation can be used. For example, where the 100k is
used then a 10k can be used to reduce the TRACK pin
offset to a negligible value.
RUN Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V Zener to ground. The pin can be
driven with 5V logic levels.
The RUN pin can also be used as an undervoltage lockout
(UVLO) function by connecting a resistor divider from
the input supply to the RUN pin. The equation for UVLO
threshold:
V
UVLO
=
R
A
+
R
B
R
B
• 1.5V
where R
A
is the top resistor, and R
B
is the bottom resistor.
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point, and tracks
with margining.
COMP Pin
The pin is the external compensation pin. The module has
already been internally compensated for most output volt-
ages. LTpowerCAD™ from Linear Technology is available
for more control loop optimization.
FCB Pin
The FCB pin determines whether the bottom MOSFET re-
mains on when current reverses in the inductor. Tying this
pin above its 0.6V threshold enables discontinuous operation
where the bottom MOSFET turns off when inductor current
reverses. FCB pin below the 0.6V threshold forces continu-
ous synchronous operation, allowing current to reverse
at light loads and maintaining high frequency operation.
PLLIN Pin
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of the external clock.
The frequency range is ±30% around the set operating
frequency. A pulse detection circuit is used to detect a
clock on the PLLIN pin to turn on the phase-locked loop.
The pulse width of the clock has to be at least 400ns. The
clock high level must be greater than 1.7V and clock low
level below 0.3V. During the start-up of the regulator, the
phase-locked loop function is disabled.
INTV
CC
and DRV
CC
Connection
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
CC
for driving the internal power MOSFETs. Therefore, if
the system does not have a 5V power rail, the LTM4612
can be directly powered by V
IN
. The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
P
LDO_LOSS
= 20mA
•
(V
IN
– 5V)
The LTM4612 also provides the external gate driver voltage
pin DRV
CC
. If there is a 5V rail in the system, it is recom-
mended to connect the DRV
CC
pin to the external 5V rail.
This is especially true for higher input voltages. Do not
apply more than 6V to the DRV
CC
pin.
APPLICATIONS INFORMATION
