3. H/W Circuit Description
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3.1.3. Synthesizer Part
The Aero I transceiver integrates two complete PLLs including VCOs, varactors, resonators, loop
filters, reference and VCO dividers, and phase detectors. The RF PLL uses two multiplexed VCOs.
The RF1 VCO is used for receive mode, and the RF2 VCO is used for transmit mode. The IF PLL is
used only during transmit mode. All VCO tuning inductors are also integrated. The IF and RF output
frequencies are set by programming the N-Divider registers, NRF1, NRF2 and NIF. Programming the
N-Divider register for either RF1 or RF2 automatically selects the proper VCO. The output frequency of
each PLL is as follows:
fOUT = N x fø
The DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow a 26 MHz
reference frequency. For receive mode, the RF1 PLL phase detector update rate (fø) should be
programmed fø = 100 kHz for DCS 1800 or PCS 1900 bands, and fø = 200 kHz for GSM 850. For
transmit mode, the RF2 and IF PLL phase detector update rates are always fø =200 kHz.
Figure 2. Synthesizer Block Diagram
Summary of Contents for L1150
Page 1: ...Service Manual Model L1150 Service Manual L1150 P N MMBD0034601 Date June 2004 Issue 1 0 ...
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Page 113: ...7 BLOCK DIAGRAM 112 Baseband Part 7 BLOCK DIAGRAM The Block Diagram of the Baseband Part ...
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