THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Vx1 51P
2014-08-27
21
K2H
TXDBN2_L
TXDBN7_L
R7117
0
OPT
R7119
33 OPT
C7109
0.1uF
PANEL_VX1
Q7103
2N3904S
LOCKAn_HTPDAn_3.3VPullup
E
B
C
C7116
0.1uF
PANEL_VX1
AR7101
0
1/16W
PANEL_VX1
DATA_FORMAT_0
TXDBN6_L
HTPDAn
TXDBP7_L
R7128
100
LOCKAn_HTPDAn_3.3VPullup
C7111
0.1uF
PANEL_VX1
R7129
1K
LOCKAn_HTPDAn_3.3VPullup
P7100
SP14-11592-01-51Pin
PANEL_VX1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
+3.3V_NORMAL
AR7100
0
1/16W
OPT
TXDBN0_L
R7126
0
OPT
HTPDAn_IN
TXDBP1_L
Q7102
2N3904S
LOCKAn_HTPDAn_3.3VPullup
E
B
C
C7108
0.1uF
PANEL_VX1
TCON_I2C_EN
R7105
1K
1/16W
5%
+3.3V_NORMAL
TXDBN4_L
LOCKAn_IN
R7104
10K
OPT
C7104
0.1uF
PANEL_VX1
R7122
100
LOCKAn_HTPDAn_3.3VPullup
C7112
0.1uF
PANEL_VX1
R7127
1K
LOCKAn_HTPDAn_3.3VPullup
+3.3V_NORMAL
R7111
10K
OPT
TXDBP4_L
R7116
4.7K
OPT
C7107
0.1uF
PANEL_VX1
R7121
10K
LOCKAn_HTPDAn_3.3VPullup
DATA_FORMAT_1
C7113
0.1uF
PANEL_VX1
+3.3V_NORMAL
TXDBN5_L
I2C_SCL6
TXDBN3_L
LOCKAn
C7106
0.1uF
PANEL_VX1
+1.8V
R7102
10K
OPT
C7110
0.1uF
PANEL_VX1
R7125
0
OPT
HTPDAn_IN
TXDBP3_L
+3.3V_NORMAL
TXDBP5_L
C7102
0.1uF
PANEL_VX1
LOCKAn_IN
C7115
0.1uF
PANEL_VX1
R7109
10K
OPT
Q7101
T2N7002AK
VX1_FET_TOSHIBA
S
G
D
3D&L_DIM_EN
I2C_SDA6
TXDBP0_L
R7115
4.7K
OPT
TXDBN1_L
R7120
33 OPT
C7105
0.1uF
PANEL_VX1
LOCKAn_IN
+3.3V_NORMAL
C7114
0.1uF
PANEL_VX1
+3.3V_NORMAL
+3.3V_NORMAL
TXDBP6_L
TXDBP2_L
TCON_I2C_EN
C7103
0.1uF
PANEL_VX1
R7101
10K
Non_INX
LOCKAn
C7117
0.1uF
PANEL_VX1
+3.3V_NORMAL
Q7100
T2N7002AK
VX1_FET_TOSHIBA
S
G
D
Q7100-*1
2N7002KA
EBK62072501
VX1_FET_KEC
G
D
S
Q7101-*1
2N7002KA
EBK62072501
VX1_FET_KEC
G
D
S
R7136
10K
OPT
R7118
10K
OPT
ON_RF_DONE
DATA_FORMAT_0
R7158
0
DATA_FORMAT_1
R7159
0
COMPENSATION_DONE
+3.3V_NORMAL
R7149
100
POWER_DET_1
R7150
10K
R7151
100
PANEL_I2C_LCD
R7152
100
PANEL_I2C_LCD
R7123
10K
UHD_LED_PANEL
R7154
100
PANEL_I2C_OLED
R7153
100
PANEL_I2C_OLED
JP7100
R7141
10K
UHD_LED_PANEL
R7157
1K
DEBUG_OLED_BDP
R7163
0
OPT
SW7100
JS2235S
DEBUG_OLED_BDP
3
2
1
4
5
6
R7156
0
OPT
R7164
0
OPT
T_CON_SYS_POWER_OFF
R7155
0
MP_OLED_BDP
T_CON_SYS_POWER_OFF_from_MODULE
R7143
10K
UHD_LED_PANEL
JP7101
COMPENSATION_DONE
T_CON_SYS_POWER_OFF_from_MODULE
R7148
100
R7145
10K
R7147
100
R7146
100
R7144
10K
UHD_LED_PANEL
C7118
0.1uF
16V
INV_CTL
JP7102
R7142
10K
UHD_LED_PANEL
R7161
0
OLED_TCON_FW
POL_TEST_EN
R7162
0
QSM_EN
PWM_DIM2
R7124
10K
R7106
10K
OPT
R7107
10K
R7112
0
R7110
0
R7114
100
OPT
R7113
100
OPT
JP7103
*Pin31(BIT_SEL)
HIGH or NC : 10Bit
LOW : 8Bit
[51P Vx1
output wafer]
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
*Pin35(PCID)
High:PCID enable
Low or NC : PCID diable
C7102~C7117
Close to EPI Wafer!
Data Input Format[1:0]
EPI Share Lane
*Mode 1 (NON Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = Low
LGD_Module
High & NC :Nosignal AGP
L : Nosignal Black
*OLED_ELVDD_DET
for OLED model
*OLED_Off-RS DONE
*UHD_Panel_Connection
*NON_OLED_3D_EN
Copyright © 2016 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Summary of Contents for EA71G
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