4-8
PIN NO.
SYMBOL
TYPE
DESCRIPTION
F13
FEGIO1
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8 mA PDR,
75K pull-down (0 V)
LDD serial interface CLK.
The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
Alternate function :
1. Internal monitored signal output
2. General IO
E10
FEGIO10
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8 mA PDR,
75K pull-down (3.3 V)
PC RS232 serial receive data.
The pin is spike-free at power-on stage.
Alternate function :
1. High speed serial output port. (CLOCK)
2. Internal monitored signal output
3. LED Control Output. Initial “0” Output
4. General IO
F7
FEGIO11
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8mA PDR,
75K pull-down (3.3 V)
PC RS232 serial transmit data.
The pin is spike-free at power-on stage.
Alternate function :
1. High speed serial output port. (Data)
2. Internal monitored signal output
3. General IO
E8
FEGIO3
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8mA PDR,
75K pull-down (0 V)
LED Control Output. Initial 0 Output.
The pin is spike-free at power-on stage.
Alternate function :
1. Internal monitored signal output
2. General IO
D7
FEGIO4
Analog Output
Read gain switch 4
Alternate function :
1. LCD serial interface command enable.
2. LCD_DRV: Square wave output for LCD control.
3. Internal monitored signal output
4. General IO.
E13
FEGIO5
Analog Output
Read gain switch 5
Alternate function :
1. SIDM
2. LCD serial interface command enable.
3. Internal monitored signal output
4. General IO.
D9
FEGIO6
Analog Output
Read gain switch 6.
The pin is not allowed to pull-up in circuit layout
Alternate function :
1. SIDM
2. LCD serial interface command enable.
3. Internal monitored signal output
4. General IO.
C7
FEGIO7
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8 mA PDR,
75K pull-down (0 V)
General IO.
The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
D6
FEGIO9
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8 mA PDR,
75K pull-down (0 V)
General IO.
The pin is spike-free at power-on stage.
Alternate function :
1. Internal monitored signal output
2. Spoke input
3. Power on reset input, high active.
4. General IO.
D19
HAVC
Analog Output
Decoupling Pin for Reference Voltage of Main and Sub Beams
B20
INA
Analog Input
Input of Main Beam Signal (A)
A20
INB
Analog Input
Input of Main Beam Signal (B)
B19
INC
Analog Input
Input of Main Beam Signal (C)
A19
IND
Analog Input
Input of Main Beam Signal (D)
Summary of Contents for BH9530TW
Page 73: ...2 58 WAVEFORMS 1 SYSTEM PART 1 MPEG CRYSTAL 27 MHZ IC501 MT8580 X TAL 27 MHz 1 1 ...
Page 74: ...2 59 2 SYSTEM PART 2 DDR3 MEMORY MT8580 BA0 MT8580 WE MT8580 CAS MT8580 CK 2 5 4 3 2 3 4 5 ...
Page 75: ...2 60 3 SYSTEM PART 3 eMMC FLASH MEMORY 7 8 6 6 7 8 ...
Page 76: ...2 61 4 AUDIO PART 1 S PDIF MT8580_AUDIO_SPDIF IN 9 9 ...
Page 77: ...2 62 5 AUDIO PART 2 I2S tjsr ijr syjr kh hW 10 11 12 13 10 11 12 13 ...
Page 78: ...2 63 6 HDMI PART H_SDA H_SCL HDMI_CLK_N HDMI_0_N 14 15 16 17 14 15 16 17 ...
Page 79: ...2 64 MEMO ...
Page 99: ...2 104 2 103 2 MAIN P C BOARD TOP VIEW ...
Page 100: ...2 106 2 105 MAIN P C BOARD BOTTOM VIEW ...
Page 101: ...2 108 2 107 3 AMP P C BOARD TOP VIEW BOTTOM VIEW ...
Page 103: ...2 112 2 111 5 FRONT P C BOARD 6 TOUCH P C BOARD TOP VIEW TOP VIEW BOTTOM VIEW BOTTOM VIEW ...
Page 105: ...3 2 MEMO ...
Page 109: ...4 SPEAKER SECTION 4 1 CENTER SPEAKER A700 ...
Page 110: ...4 2 FRONT REAR SPEAKER A800B A800T A800M A800 850 850 ...
Page 111: ...4 3 PASSIVE SUBWOOFER A900 ...
Page 113: ...MEMO ...
Page 127: ...4 14 MEMO ...
Page 139: ...5 12 MEMO ...
Page 146: ...5 25 5 26 2 AMP P C BOARD TOP VIEW BOTTOM VIEW ...
Page 147: ...5 27 5 28 MEMO MEMO ...