H13 Block Diagram (Internal)
Tuner
DIF
TS (P)
System
Demux
Audio DSP
Multi-STD
Audio Decoder
LX4 HiFi EP
SIF
Global Baseband
V/Q, DVB-T/C ISDB-T
CVBS(3ch)
Component(2ch)
HDMI-Rx 1.4
(1-port PHY)
3D, ARC, 4kx2k
AAD
(THAT)
M
ux
H13A
H13D
Audio L/R(4-
ch)
SCART out
SW
I2S(External)
Audio DAC (48KHz)
Video Decoder
Multi-STD
HD Decoder
(Boda950)
CVBS AFE(2-ch)
12b@54MHz
CVBS-Out
Mux
10x3ch
DE
CVBS
Encoder
DDR3 PHY
DDR3 Controller
Audio
Line Out
LVDS
Tx
Audio PLL
w/ DCO
Sou
rce
Mux
TNR
De
-
interlacer
Main/Su
b
Scaler
H
3D
VCR
2D GFX
JPG/PNG Decoder
TrustZone
CPU
ARMCA9 Core
Dual 1.2GHz
32KBI$
32KBD$
1MB L2 $
SW
SW
3ch Video
AFE
w/ LLPLL
LVDS
Rx
Sound DSP
Clear Voice II
Perceptual
Volume Control
Slim SPK
DivX
Bluetooth
Digital AMP
I2S
I2S(HPD)
SPDIF
JPG Encoder
CVD
Y/C
CVBS
CPU
64KB SRAM
48KB ROM
UART
OTP
Timer
UARTx3
EMAC
SCI
SPIx2
I2Cx10
eMMC
DMAC(8ch)
Timer
WDT
PH
Y
SRAM 16KB
I2Cx1
BE
H
3D
DDR3 PHY
DDR3 Controller
SPLL
DDR
PLL
DPLL
DDR
PLL
Digital
Audio
Output
16
TS(P)
TS(P)
FRC
SRE
P
E1
OSD
L
ED
Out
pu
t
form
at
ter
TCON
MCU
Capture
Block
(3CH)
GBB AFE
1ch@30MHz
w/ PLL
BTSC AFE
w/ PLL
1ch L/R
Audio-ADC
24b@48KHz
CVBS DAC
5x1ch (1ch)
I2Cx1
HDMI
(1-Link)
HDMI
Mux
DVB-CI/CI+
8
Video Encoder
1080p@30fps
Analog Chip Total Pin : 183w/o Power
Digital Chip Total Pin : 491w/o Power
AtoDPin : 79
TS(S)
Vx1/
EPI
/L
VD
S
Com
bo
(120H
z
)
GPU Rogue Han
USB3.0 x1
USB2.0x3
GPIOx136
Secure Engine
TS(S)
Audio DAC
(48KHz )
I2S
I2S
SW
CPLL
DCO
x2
MCU
SDRAM
(MCP)
GPIOIx16
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Summary of Contents for 77EG9700
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