Lake Shore Model 218 Temperature Monitor User’s Manual
6-4
Remote Operation
Status Byte Register and Service Request Enable Register (Continued)
Service Request (SRQ) Bit (6)
– Determines whether the Model 218 is to report via the SRQ line
and six bits determine which status reports to make. If bits 0, 2, 3, 4, 5, or 7 are set, then the
corresponding bit in the Status Byte Register is set. The Model 218 produces a service request only
if bit 6 of the Service Request Enable Register is set. If disabled, the Status Byte Register can still
be read by the BUS CONTROLLER by means of a serial poll (SPE) to examine the status reports,
but the BUS CONTROLLER will not be interrupted by the Service Request. The
Q
STB common
command reads the Status Byte Register but will not clear the bits. It must be understood that
certain bits in the Status Byte Register continually change.
Bits 0-5 and 7 remain latched until the Status Byte Register is read. The bit assignments are
discussed below as they pertain to the Status Byte Register. These reports can only be made if
they have been enabled in the Service Request Enable Register.
Standard Event Status (ESB) Bit (5)
– When bit 5 is set, it indicates if one the bits from the
Standard Event Status Register has been set. (Refer to Paragraph 6.1.3.2.)
Error, Bit (4)
– This bit is set when there is an instrument error not related to the bus.
Alarm, Bit (3)
– This bit is set when there is an alarm condition.
Overload, Bit (2)
– This bit is set when any input is in either SOVER, TOVER, SUNDER, or
TUNDER.
New Reading, Bit (0)
– New data is available from at least one of the inputs.
6.1.3.2
Standard Event Status Register and Standard Event Status Enable Register
The Standard Event Status Register supplies various conditions of the Model 218.
STANDARD EVENT STATUS REGISTER FORMAT
Bit
–
7 6 5 4 3 2 1 0
Weighting
–
128
64 32 16 8 4 2 1
Bit Name –
PON
Not Used
CME EXE DDE QYE
Not Used
OPC
Bits 2 and 6 are not used. The user will only be interrupted with the reports of this register if the bits
have been enabled in the Standard Event Status Enable Register and if bit 5 of the Service
Request Enable Register has been set.
The Standard Event Status Enable Register allows the user to enable any of the Standard Event
Status Register reports. The Standard Event Status Enable command (
Q
ESE) sets the Standard
Event Status Enable Register bits. If a bit of this register is set, then that function is enabled. To set
a bit, send the command
Q
ESE with the bit weighting for each bit you want to be set added
together. Refer to the
Q
ESE command discussion for further details.
The Standard Event Status Enable Query,
Q
ESE?, reads the Standard Event Status Enable
Register.
Q
ESR? reads the Standard Event Status Register. Once this register has been read, all
of the bits are reset to zero.
Power On (PON) Bit (7)
– Set to indicate an instrument off-on transition.
Command Error (CME) Bit (5)
– If bit 5 is set, a command error has been detected since the last
reading. This means that the instrument could not interpret the command due to a syntax error,
an unrecognized header, unrecognized terminators, or an unsupported command.
Execution Error (EXE) Bit (4)
– If bit 4, the EXE bit is set, an execution error has been detected.
This occurs when the instrument is instructed to do something not within its capabilities.
Device Dependent Error (DDE) Bit (3)
– A device dependent error has been detected if the DDE
bit is set. The actual device dependent error can be found by executing the various device
dependent queries.
Summary of Contents for 218S
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