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4.3.2.2 Service Request Enable Register
The service request enable register is programmed by the user and determines which
summary bits of the status byte may set bit 6 (MSS). Enable bits are logically ANDed
with the corresponding summary bits (FIGURE 4-2). Whenever a summary bit is set by
an event register and its corresponding enable bit is set by the user, bit 6 will be set.
The Service Request Enable command (*SRE) programs the Service Request Enable
Register and the query command (*SRE?) reads it
.
4.3.2.3 Standard Event Status Register Set
The standard event status register reports the following interface-elated instrument
events: power on detected, command syntax errors, command execution errors,
query errors, and operation complete. Any or all of these events may be reported in
the standard event summary bit through the enable register (FIGURE 4-3). The stan-
dard event status enable command (*ESE) programs the enable register and the
query command (*ESE?) reads it. *ESR? reads and clears the standard event status
register.
The used bits of the standard event register are described as follows:
D
Power On (PON), Bit (7):
this bit is set to indicate an instrument off-on transition.
D
Command Error (CME), Bit (5):
this bit is set if a command error has been detected
since the last reading. This means that the instrument could not interpret the
command due to a syntax error, an unrecognized header, unrecognized termina-
tors, or an unsupported command.
D
Execution Error (EXE), Bit (4):
this bit is set if an execution error has been detected.
This occurs when the instrument is instructed to do something not within its
capabilities. A typical example of this are command parameters that are outside
the instrument’s acceptable bounds.
D
Device Specific Error (DSE), Bit (3):
this bit is set if an error occurs that does not fall
into another category defined as a standard event. Examples include if the
teslameter is unable to set its date/time, time zone, or if the wireless peripherals
throw an exception.
D
Query Error (QYE), Bit (2):
this bit indicates a query error. It occurs rarely and involves
loss of data because the output queue is full.
D
Operation Complete (OPC), Bit (0):
when *OPC is sent, this bit will be set when the
instrument has completed all pending operations. The operation of this bit is not
related to the *OPC? command, which is a separate interface feature
(section 4.2.8).
FIGURE 4-2
Status byte register and service request enable register
OR
AND
AND
AND
AND
AND
Not
used
Not
used
OSB
ESB
MSS
MAV
QSB
EAV
7
6
5
4
3
2
1
0
Not
used
Not
used
OSB
ESB
MSS
MAV
QSB
EAV
7
6
5
4
3
2
1
0
Read by
*STB?
Service request
enable register
*SRE, *SRE?
Status byte register
*STB?
From operation event register
From standard event status register
From output buffer
From questionable event status register
From error queue
— Bit
— Name
— Bit
— Name
