LabJack UE9, User Manual

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detected. If a timer is reset and read in the same function call, the read returns the value just before the reset.
2.10.1.6 - Firmware Counter Input With Debounce (Mode 6)
Intended for frequencies less than 10 Hz, this mode adds a debounce feature to the firmware counter, which is particularly useful
for signals from mechanical switches. On every applicable edge seen by the external pin, this mode increments a 32-bit register.
Unlike the pure hardware counters, these timer counters require that the firmware jump to an interrupt service routine on each
edge.
When configuring only (UpdateConfig=1), the low byte of the timer value is a number from 0-255 that specifies a debounce period
in 87 ms increments (plus an extra 0-87 ms of variability):
Debounce Period = (0-87 ms) + (TimerValue * 87 ms)
In the high byte (bits 8-16) of the timer value, bit 0 determines whether negative edges (bit 0 clear) or positive edges (bit 0 set) are
counted.
Assume this mode is enabled with a value of 1, meaning that the debounce period is 87 ms and negative edges will be counted.
When the input detects a negative edge, it increments the count by 1, and then waits 87 ms before re-arming the edge detector.
Any negative edges within the 87 ms debounce period are ignored. This is good behavior for a normally-high signal where a
switch closure causes a brief low signal. The debounce period can be set long enough so that bouncing on both the switch closure
and switch open is ignored.
When only updating and not configuring, writing a value of zero to the timer performs a reset. After reset, a read of the timer value
will return zero until a new edge is detected. If a timer is reset and read in the same function call, the read returns the value just
before the reset.
2.10.1.7 - Frequency Output (Mode 7)
Outputs a square wave at a frequency determined by TimerClockBase/TimerClockDivisor divided by 2*Timer#Value. The Value
passed should be between 0-255, where 0 is a divisor of 256. By changing the clock configuration and timer value a wide range of
frequencies can be output. The maximum frequency is 48000000/2 = 24 MHz. The minimum frequency is (750000/256)/(2*256) =
5.7 Hz.
The frequency output has a -3 dB frequency of about 10 MHz on the FIO lines. Accordingly, at high frequencies the output
waveform will get less square and the amplitude will decrease.
The output does not necessarily start instantly, but rather waits for the internal clock to roll. For example, if the output frequency is
100 Hz, that means the period is 10 milliseconds, and thus after the command is received by the device it could be anywhere from
0 to 10 milliseconds before the start of the frequency output.
2.10.1.8 - Quadrature Input (Mode 8)
Requires 2 timer channels used in adjacent pairs (0/1, 2/3, or 4/5). Even timers will be quadrature channel A, and odd timers will
be quadrature channel B. The UE9 does 4x quadrature counting, and returns the current count as a signed 32-bit integer (2’s
complement). The same current count is returned on both even and odd timer value parameters.
Writing a value of zero to either or both timers performs a reset of both. After reset, a read of either timer value will return zero until
a new quadrature count is detected. If a timer is reset and read in the same function call, the read returns the value just before the
reset.
4X Counting
Quadrature mode uses the very common 4X counting method, which provides the highest resolution possible. That means you get
a count for every edge (rising & falling) on both phases (A & B). Thus if you have an encoder that provides 32 PPR, and you rotate
that encoder forward 1 turn, the timer Value register will be incremented by +128 counts.
Z-phase support
Quadrature mode supports Z-Phase. When enabled this feature will set the count to zero when the specified IO line sees a logic
high.
Z-phase is controlled by the value written to the timer during initialization. To enable z-phase support set bit 15 to 1 and set bits 0
through 4 to the DIO number that Z is connected to. EG: for a Z-line on EIO3 set the timer value to 0x800B or 32779. This value
should be sent to both the A and B timers.
Note that the LabJack will only check Z when it sees an edge on A or B.
Z-phase support requires Control Firmware 2.11 or later.
2.10.1.9 - Timer Stop Input (Mode 9)
This mode should only be assigned to odd numbered timers (1, 3, or 5). On every rising edge seen by the external pin , this
mode increments a 16-bit register. When that register matches the specified timer value (stop count value), the adjacent even
timer is stopped (0/1, 2/3, or 4/5). The range for the stop count value is 1-65535. Generally, the signal applied to this timer is from
the adjacent even timer, which is configured in some output timer mode. One place where this might be useful is for stepper
motors, allowing control over a certain number of steps.
Note that the timer is counting from the external pin like other input timer modes, so you must connect something to the stop timer
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