Kontron PCI-953, User Manual

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Chipset Setup 4-63 PCI-953 Single Board Computer User’s Guide
BIOS Setup
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Configure DRAM Timing by SPD
This selection provides the option to select DRAM timing detection using Serial Presence Detect
(SPD) or by manually setting it. Enabled is the default setting.
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DRAM CAS# Latency
This option selects DRAM CAS# latency. 2.5 is the default setting.
Options: 2, 2.5*, 3
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DRAM RAS# Precharge
This option selects DRAM RAS# precharge. 4 CLKs is the optimal and fail-safe default setting.
Options: 2CLKs, 3CLKs, 4CLKs*
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DRAM RAS# to CAS# Delay
This option selects the DRAM RAS# to CAS# delay. 4CLKs is the optimal and fail-safe default
setting.
Options: 2CLKs, 3CLKs, 4CLKs*
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DRAM Precharge Delay
This option selects the DRAM precharge delay. 8CLKs is the optimal and fail-safe default setting.
Options: 5CLKs, 6CLKs, 7CLKs, 8CLKs*
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DRAM Burst Length
This option selects the DRAM burst length. 8 is the optimal default setting. 4 is the fail-safe
default setting.
Options: 4, 8*
Disabled Set this option to configure DRAM timing manually.
Enabled*
Set this option to configure DRAM timing using SPD. This is the default
setting.