Kontron 3.5-SBC-APL User Manual Download Page 27

3.5-SBC-APL – Rev. 0.1 

 

 

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Pin Assignment Serial Connector 

Pin 

Signal 

1

 

NDCDA

 

2

 

NSINA

 

3

 

NSOUTA

 

4

 

NDTRA

 

5

 

GND

 

6

 

NDSRA

 

7

 

NRTSA

 

8

 

NCTSA

 

9

 

NRIA

 

 

6.4.

 

Display Port Connector 

The Display Port (DP) connector complies to the Display Port 1.2 standard. 

Figure 9: Display Port Connector 

 

 

Pin 

Signal 

Pin 

Signal 

1

 

DDI0_TX0_DP_R 

GND 

3

 

DDI0_TX0_DN_R 

DDI0_TX1_DP_R 

5

 

GND 

DDI0_TX1_DN_R 

7

 

DDI0_TX2_DP_R 

GND 

9

 

DDI0_TX2_DN_R 

10 

DDI0_TX3_DP_R 

11

 

GND 

12 

DDI0_TX3_DN_R 

13

 

DP0_DET 

14 

GND 

15

 

DPD0_AUX_DP 

16 

GND 

17

 

DPD0_AUX_DP 

18 

GND 

19

 

GND 

20 

+3.3V 

 

 

 

 

Summary of Contents for 3.5-SBC-APL

Page 1: ...USER GUIDE 3 5 SBC APL Doc Rev 0 1 Preliminary Doc ID 1061 0789...

Page 2: ...User Guide 3 5 SBC APL Rev 0 1 www kontron com 2 This page has been intentionally left blank...

Page 3: ...will be suitable for the specified use without further testing or modification Kontron expressly informs the user that this user guide only contains a general description of processes and instruction...

Page 4: ...ns is entirely at your risk To minimize the risks associated with your products and applications you should provide adequate design and operating safeguards You are solely responsible for compliance w...

Page 5: ...by visiting http www kontron com support Customer Service As a trusted technology innovator and global solutions provider Kontron extends its embedded market strengths into a services portfolio allow...

Page 6: ...cated and or prescribed by the law may endanger your life health and or result in damage to your material ESD Sensitive Device This symbol and title inform that the electronic boards and their compone...

Page 7: ...ming any work on this product Earth ground connection to vehicle s chassis or a central grounding point shall remain connected The earth ground cable shall be the last cable to be disconnected or the...

Page 8: ...actured to satisfy environmental protection requirements where possible Many of the components used structural parts printed circuit boards connectors batteries etc are capable of being recycled Final...

Page 9: ...essors 19 4 4 1 Processor Cooling 19 4 5 System Memory Support 20 4 6 Graphics 20 4 7 Power Consumption 20 5 Mainboard views 22 5 1 Top Side 22 5 2 External I O Connector Side 23 5 3 Rear Side 24 6 I...

Page 10: ...enu Functions 45 Table 12 Boot Priority Order 45 Table 13 Save Exit Setup Menu Functions 46 Table 14 List of Acronyms 47 List of Figures Figure 1 System Block Diagram 18 Figure 2 3 5 SBC APL with CPU...

Page 11: ...xternal I O connector panel and 1 x USB3 0 on the internal header 1x USB 2 0 and 1x USB3 0 on the front panel internal header 1x RS232 RS422 RS485 and 1 x RS232 internal TPM2 0 and WIBU security featu...

Page 12: ...ring the board Otherwise components RAM LAN cards etc might get damaged Make sure to use a standard ATX PSU with a suitable cable kit and PS_ON active 2 Insert the memory module s Be careful to push t...

Page 13: ...electrical and fire enclosure The system in its enclosure must be evaluated for temperature and airflow considerations The motherboard must be powered by a CSA or UL approved power supply that limits...

Page 14: ...ber Product Name Description 43010 1000 14 1 3 5 SBC APL N3350 C 3 5 SBC APL Celeron N3350 2C 2 3GHz 6W with cooler Table 2 Industrial Temperature 40 C to 85 C Product Number Product Name Description...

Page 15: ...hics Controller Support for DirectX 11 OpenGL4 3 compliant of pixel shader OGL 3 2 Controller Intel Gen9LP DP to LVDS Controller EDP to LVDS transceiver PTN3460BS F6 Display Interface 1x DP version 1...

Page 16: ...ore 12 V 3 3 V 5 V Two temperatures CPU temperature temperature at the center of the motherboard fan speed Watchdog Timer Reset 1 sec to 255 min and 1 sec or 1 min step Wake On Wake on LAN WoL S3 S5 W...

Page 17: ...environments Federal Communication Commission FCC FCC class B Safety EN 60950 1 2006 A11 2009 A1 2010 A12 2011 is planned Safety for information technology equipment including electrical and business...

Page 18: ...3 5 SBC APL Rev 0 1 www kontron com 18 4 3 Block Diagram The following block diagram displays the system architecture of the 3 5 SBC APL Figure 1 System Block Diagram...

Page 19: ...mal Design Power TDP TJUNCTION 12 W 110 C 9 5 W 85 C 6 5 W 110 C 6 W 105 C Memory Types DDR3L 1866 MT s DDR3L 1866 MT s DDR3L 1866 MT s DDR3L 1866 MT s Maximum Memory Channels 4 4 4 2 Max MemorySize 8...

Page 20: ...0 x 2160 3840 x 2160 Intel Atom x5 E3940 Intel Atom x5 E3930 Intel HD graphics 500 400 MHz HDMI DP 3840 x 2160 3840 x 2160 Intel Celeron N3350 Intel HD graphics 500 200 MHz HDMI DP 3840 x 2160 3840 x...

Page 21: ...C APL Rev 0 1 www kontron com 21 Table 7 Supply Voltage Requirements Supply Min Max Note 12 V 11 4 V 12 6 V Supply voltage should be 5 for compliance with the ATX specification GND 0 V 0 V Power Suppl...

Page 22: ...Side View 1 CPU with cooler 2 Memory 3 Buzzer connector 4 CPU fan connector 5 Power connector 6 Front panel 7 LVDS 8 CMOS Jumper 9 Battery connector 10 Audio 11 SATA 12 SATA Power 13 MPCIe 14 USB 3 0...

Page 23: ...3 5 SBC APL Rev 0 1 www kontron com 23 5 2 External I O Connector Side Figure 4 I O Connector Panel View 17 USB 3 0 connector 18 LAN connector 19 HDMI 20 Display Port 21 COM1 interface 20 19 21 18 17...

Page 24: ...3 5 SBC APL Rev 0 1 www kontron com 24 5 3 Rear Side Figure 5 Rear Side Board View...

Page 25: ...backward compatible with USB2 0 Figure 6 Dual stack USB 3 0 Connector 1 9 10 19 Pin Assignment USB Connector Pin Signal 1 VBUS1 2 U_USB1N_R 3 U_USB1P_R 4 GND 5 USB3_L_RX1_N 6 USB3_L_RX1_P 7 GND 8 USB...

Page 26: ...N1 LAN2 Pin Signal R1 L_MDIP0 LAN2_MDI_0 R2 L_MDIN0 LAN2_MDI_0J R3 L_MDIP1 LAN2_MDI_1 R4 L_MDIN1 LAN2_MDI_1J R5 LANxPW1 LANxPW2 R6 LANxPW1 LANxPW2 R7 L_MDIP2 LAN2_MDI_2 R8 L_MDIN2 LAN2_MDI_2J R9 L_MDI...

Page 27: ...Connector The Display Port DP connector complies to the Display Port 1 2 standard Figure 9 Display Port Connector Pin Signal Pin Signal 1 DDI0_TX0_DP_R 2 GND 3 DDI0_TX0_DN_R 4 DDI0_TX1_DP_R 5 GND 6 D...

Page 28: ...28 6 5 HDMI Connector Figure 10 HDMI Graphics Connector Pin Signal Pin Signal 1 DVITX2 2 GND 3 DVITX2 4 DVITX1 5 GND 6 DVITX1 7 DVITX0 8 GND 9 DVITX0 10 DVITXC 11 GND 12 DVITXC 13 x 14 x 15 HDMIxCLK 1...

Page 29: ...USB_P6_DN_R 4 USB_P7_DN_R 5 USB_P6_DP_R 6 USB_P7_DP_R 7 GND 8 GND 9 10 GND 7 2 LVDS Connector The LVDS connector is based on a 40 pin connector and supports either single channel 18 bit 24 bit LVDS Th...

Page 30: ...0 5 A 29 LVDS B0 LVDS 30 LVDS B0 LVDS 31 LVDS B1 LVDS 32 LVDS B1 LVDS 33 LVDS B2 LVDS 34 LVDS B2 LVDS 35 LVDS BCLK LVDS 36 LVDS BCLK LVDS 37 LVDS B3 LVDS 38 LVDS B3 LVDS 39 GND PWR Max 0 5 A 40 GND P...

Page 31: ...2 Pin Assignment Serial Port Connector Pin Signal Pin Signal 1 NDCDB 2 NDSRB 3 NSINB 4 NRTSB 5 NSOUTB 6 NCTSB 7 NDTRB 8 NRIB 9 GND 10 7 4 SATA Connector SATA The SATA connector supplies a 3 Gbit s dat...

Page 32: ...Assignment SATA Power SATA_PWR Pin Signal 1 12V 2 GND 3 GND 4 VCC5 7 6 Audio Connector AUDIO1 The audio connector AUDIO1 provides audio output audio inputs and microphone signals Figure 16 Audio Conn...

Page 33: ...Front Panel FP1 The front panel connector supplies signals for the power button power LED and storage LED Figure 18 Front Panel Connector Pin Assignment Front Panel Connector FP1 Pin Signal Pin Signal...

Page 34: ...r providing 12 V DC to the processor voltage regulator Hot plugging of the power connectors is not allowed Hot plugging might damage the board When connecting to the motherboard turn off main supply t...

Page 35: ...9 UIM C4 20 W_DISABLE 21 GND 22 PLTRST 23 PCIe_RX 24 3 3V_S5 25 PCIe_RX 26 GND 27 GND 28 1 5V_S0 29 GND 30 PU 3 3V S5 Optional SMB_CLK 31 PCIe_TX 32 PU 3 3V S5 Optional SMB_DAT 33 PCIe_TX 34 GND 35 GN...

Page 36: ...3 5 SBC APL Rev 0 1 www kontron com 36 Pin Description 1 3V_BATT 2 RTCRST 3 GND Function Pin 1 2 Default Pin 2 3 Clear CMOS...

Page 37: ...This screen lists the Main Setup menu sub screens and provides basic system information as well as functions for setting the system time and date Table 8 Main Setup Menu Sub Screens Functions Sub Scre...

Page 38: ...ound TPM 1 2 will be enumerated ACPI Settings Enable ACPI Auto Configuration Enable Disable BIOS ACPI Auto Configuration Enable Hibernation Enable Disable system ability to Hibernate OS S4 Sleep state...

Page 39: ...urbo Mode Enable Disable Turbo Mode Intel Virtualization Technology Whe Enabled a VMM can Utilize the nadditional hardware capabilities provided by Vanderpool Technology VT d Enable Disable CPU VT d B...

Page 40: ...annel Select LVDS Interface Signals mode Single Channel or Dual Channel Sometimes called Single Pixel or Dual Pixel Bus Swapping Swap LVDS interface signals Normal use bus as indicated by pin name Swa...

Page 41: ...re of the ACPI Critical Trip Point the point in which the OS will shut the system off Passive Trip point This value controls the temperature of the ACPI Passive Trip Point the point in which the OS wi...

Page 42: ...clocks Real Time Option Select Read Time Enabled and IDI Agent Real Time Traffic Mask Bits Uncore Configuration GOP Driver Enable GOP driver will unload VBIOS Disable it will load VBIOS Intel Graphic...

Page 43: ...ots Panel Scaling Select Panel scaling GMCH BLC Control Back Light Control Setting South Cluster Configuration HD Audio Configuration HD Audio Support Enable Disable HD Audio Support PCI Express Confi...

Page 44: ...e Compliance Mode Options to disable XHCI Link Compliance mode Default is FALSE to not disable Compliance Mode Set TRUE to disable Compliance Mode Miscellaneous Configuration High Precision Timer Enab...

Page 45: ...Audit Mode Enter Audit Mode If current System Mode is User PK variable will be erased on transition to Audit Secure Boot Mode Secure Boot Mode Custom Standard Set UEFI Secure Boot Mode to STANDARD mo...

Page 46: ...ns 8 7 Save Exit Setup Menu The Save Exit Setup menu provides functions for handling changes made to the UEFI BIOS settings and the exiting of the Setup program Table 13 Save Exit Setup Menu Functions...

Page 47: ...ouse LVDS Low Voltage Differential Signaling MEI Management Engine Interface MMIO MemoryMappedIO MTBF Mean Time Before Failure NCSI Network Communications Services Interface PCIe PCI Express PECI Plat...

Page 48: ...ccelerated time to market reduced total cost of ownership product longevity and the best possible overall application with leading edge highest reliability embedded technology Kontron is a listed comp...

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