Keysight M5200A, Startup Manual

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76 M5200A PXIe Digitizer Modules Startup Guide
4 Troubleshooting and Safety information
4.4.3: Timing errors during k7z file generation
If you encounter timing closure errors during sandbox design compilation,
c ha n g e t h e
p l a c e _ d e s i g n - d i r e c t i v e
o p t i o n s i n t he
keysight_common_build.tcl file, located at C:\Program Files\Keysight\
M5200A\BSP\<GW-version>\scripts . See Figure 37 .
The
place_design -directive
options available are:
# AltSpreadLogic_medium
# AltSpreadLogic_high
# AltSpreadLogic_low
# ExtraNetDelay_low
# ExtraNetDelay_high
# Explore
After changing this option, close the PathWave FPGA interface and
relaunch the application for the changes to take effect.
Figure 37 Changing place_design -directive in the keysight_common_build.tcl file