TK-3170
21
4. Frequency Synthesizer Unit
4-1. Frequency Synthesizer
The frequency synthesizer consists of the TCXO (X501),
VCO, PLL IC (IC501) and buffer amplifiers.
The TCXO generates 16.8MHz. The frequency stability is
2.5ppm within the temperature range of –30 to +60
°
C. The
frequency tuning and modulation of the TCXO are done to
apply a voltage to pin 1 of the TCXO. The output of the TCXO
is applied to pin 8 of the PLL IC.
The VCO consists of 2VCO and covers a dual range of the
390.05~420.05MHz (E) or 420.05~462.05MHz (X2) and the
440~470MHz (E) or 470~512MHz (X2). The VCO generates
390.05~420.05MHz (E) or 420.05~462.05MHz (X2) for pro-
viding to the first local signal in receive. The operating fre-
quency is generated by Q502 in transmit mode and Q503 in
receive mode. The oscillator frequency is controlled by apply-
ing the VCO control voltage, obtained from the phase com-
parator (IC501) to the variable capacitor diodes (D505 and
D507 in transmit mode and D509 and D511 in receive mode).
The RX pin of IC4 goes “low” in receive mode causing
Q503 and Q504 (2/2) turn on. The TX pin goes “low” in trans-
mit mode causing Q502 and Q504 (1/2) turn on.
The outputs from Q502 and Q503 are amplified by buffer
amplifier (Q506) and doubled by Q501 and then sent to PLL
IC.
The PLL IC consists of a prescaler, reference divider,
phase comparator, charge pump (The frequency step of the
PLL circuit is 5 or 6.25kHz). The input signal from the pins 8
and 5 of the PLL IC is divided down to the 5 or 6.25kHz and
compared at phase comparator. The pulsed output signal of
the phase comparator is applied to the charge pump and
transformed into DC signal in the loop filter (LPF). The DC
signal is applied to the CV of the VCO and locked to keep the
VCO frequency constant.
PLL data is output from PLLDAT (pin 93), PCK (pin 79) and
PLE (pin 78) of the microprocessor (IC7). The data are input
to the PLL IC when the channel is changed or when transmis-
sion is changed to reception and vice versa. A PLL lock con-
dition is always monitored by the pin 77 (UL) of the micropro-
cessor. When the PLL is unlocked, the UL goes low.
5. Control Circuit
The control circuit consists of microprocessor (IC7) and its
peripheral circuits. It controls the TX-RX unit. IC7 mainly per-
forms the following;
1) Switching between transmission and reception by PTT
signal input.
2) Reading system, zone, frequency, and program data from
the memory circuit.
3) Sending frequency program data to the PLL.
4) Controlling squelch on/off by the DC voltage from the
squelch circuit.
5) Controlling the audio mute circuit by decode data input.
6) Transmitting tone and encode data.
5-1. Frequency Shift Circuit
The microprocessor (IC7) operates at a clock of 11.0592
MHz. This oscillator has a circuit that shifts the frequency by
Beat shift switch (Q17).
A beat sound may be able to be evaded from generation if
“Beat Shift” is set to ON when it is generated in the internal
spurious transmission modulated sound of a transceiver.
LPF
RF
VCO
PLL
CPU
20
15
5
Doubler
x2
CV
Q507
TCXO
X501
SW
D516
SW D515
To
drive
amp
Q501
To mixer
8
FC
BAL
IC17
VC
TX
RX
IC501
UL
IC7
PLLDT,PCK,PLE
Fig. 7
PLL block diagram
Q17
C62
X1
XOUT
SHIFT
XIN
IC7
CPU
“H” : OFF
“L” : ON
Fig. 8
Frequency shift circuit
5-2. Memory Circuit
Memory circuit consists of the CPU (IC7) and a flash
memory (IC8). A flash memory has a capacity of 4M bits and
contains the transceiver control program for the CPU. It also
stores the data for transceiver channels and operating param-
eter that are written by the FPU. This program can be easily
written from an external devices.
The EEPROM (IC9) stores the last channel data, the scan
on status, and other parameters.
■
Flash memory
Note :
The flash memory stores the data that is written by
the FPU (KPG-101D), and firmware program (User mode,
Test mode, Tuning mode, etc.). This data must be rewritten
when replacing the flash memory.
■
EEPROM
Note :
The EEPROM stores tuning data (Deviation, Squelch,
etc.).
Realign the transceiver after replacing the EEPROM.
CPU
EEPROM
FLASH
IC7
IC8
IC9
Fig. 9
Memory circuit
CIRCUIT DESCRIPTION